1739bf618d
* ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000. * ld-powerpc/vxworks1.dd: Update accordingly. * ld-powerpc/vxworks1-lib.nd: Likewise. * ld-powerpc/vxworks1-lib.rd: Likewise. * ld-powerpc/vxworks1.rd: Likewise.
48 lines
1.7 KiB
Text
48 lines
1.7 KiB
Text
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.*: file format .*
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: 3d 80 00 09 lis r12,9
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80802: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_
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80804: 39 8c 04 00 addi r12,r12,1024
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80806: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_
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80808: 80 0c 00 08 lwz r0,8\(r12\)
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8080c: 7c 09 03 a6 mtctr r0
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80810: 81 8c 00 04 lwz r12,4\(r12\)
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80814: 4e 80 04 20 bctr
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80818: 60 00 00 00 nop
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8081c: 60 00 00 00 nop
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80820: 3d 80 00 09 lis r12,9
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80822: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0xc
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80824: 81 8c 04 0c lwz r12,1036\(r12\)
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80826: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0xc
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80828: 7d 89 03 a6 mtctr r12
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8082c: 4e 80 04 20 bctr
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80830: 39 60 00 00 li r11,0
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80834: 4b ff ff cc b 80800 <_PROCEDURE_LINKAGE_TABLE_>
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80838: 60 00 00 00 nop
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8083c: 60 00 00 00 nop
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80840: 3d 80 00 09 lis r12,9
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80842: R_PPC_ADDR16_HA _GLOBAL_OFFSET_TABLE_\+0x10
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80844: 81 8c 04 10 lwz r12,1040\(r12\)
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80846: R_PPC_ADDR16_LO _GLOBAL_OFFSET_TABLE_\+0x10
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80848: 7d 89 03 a6 mtctr r12
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8084c: 4e 80 04 20 bctr
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80850: 39 60 00 01 li r11,1
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80854: 4b ff ff ac b 80800 <_PROCEDURE_LINKAGE_TABLE_>
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80858: 60 00 00 00 nop
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8085c: 60 00 00 00 nop
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Disassembly of section \.text:
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00080c00 <_start>:
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80c00: 4b ff fc 41 bl 80840 <_PROCEDURE_LINKAGE_TABLE_\+0x40>
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80c00: R_PPC_PLTREL24 \.plt\+0x40
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80c04: 48 00 00 09 bl 80c0c <sexternal>
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80c04: R_PPC_PLTREL24 sexternal
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80c08: 4b ff fc 19 bl 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
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80c08: R_PPC_PLTREL24 \.plt\+0x20
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00080c0c <sexternal>:
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80c0c: 4e 80 00 20 blr
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