68a6428382
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1. gas/testsuite/ * gas/aarch64/alias.s: Add tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update. * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/illegal.s: Add tests. * gas/aarch64/illegal.l: Update. include/opcode/ * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. (enum aarch64_opnd): Add AARCH64_OPND_COND1. opcodes/ * aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'. (convert_from_csel): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): Handle AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1. (aarch64_print_operand): Handle AARCH64_OPND_COND1. * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of COND for cinc, cset, cinv, csetm and cneg. (AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1. * aarch64-asm-2.c: Re-generated. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto.
358 lines
8.9 KiB
C
358 lines
8.9 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
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/* Copyright 2012, 2013 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "aarch64-asm.h"
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const aarch64_opcode *
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aarch64_find_real_opcode (const aarch64_opcode *opcode)
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{
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/* Use the index as the key to locate the real opcode. */
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int key = opcode - aarch64_opcode_table;
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int value;
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switch (key)
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{
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case 3: /* ngc */
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value = 2; /* --> sbc. */
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break;
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case 5: /* ngcs */
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value = 4; /* --> sbcs. */
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break;
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case 8: /* cmn */
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value = 7; /* --> adds. */
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break;
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case 11: /* cmp */
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value = 10; /* --> subs. */
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break;
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case 13: /* mov */
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value = 12; /* --> add. */
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break;
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case 15: /* cmn */
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value = 14; /* --> adds. */
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break;
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case 18: /* cmp */
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value = 17; /* --> subs. */
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break;
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case 21: /* cmn */
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value = 20; /* --> adds. */
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break;
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case 23: /* neg */
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value = 22; /* --> sub. */
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break;
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case 26: /* negs */
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case 25: /* cmp */
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value = 24; /* --> subs. */
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break;
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case 139: /* mov */
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value = 138; /* --> umov. */
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break;
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case 141: /* mov */
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value = 140; /* --> ins. */
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break;
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case 143: /* mov */
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value = 142; /* --> ins. */
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break;
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case 204: /* mvn */
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value = 203; /* --> not. */
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break;
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case 259: /* mov */
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value = 258; /* --> orr. */
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break;
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case 314: /* sxtl */
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value = 313; /* --> sshll. */
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break;
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case 316: /* sxtl2 */
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value = 315; /* --> sshll2. */
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break;
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case 336: /* uxtl */
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value = 335; /* --> ushll. */
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break;
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case 338: /* uxtl2 */
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value = 337; /* --> ushll2. */
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break;
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case 431: /* mov */
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value = 430; /* --> dup. */
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break;
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case 498: /* sxtw */
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case 497: /* sxth */
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case 496: /* sxtb */
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case 499: /* asr */
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case 495: /* sbfx */
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case 494: /* sbfiz */
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value = 493; /* --> sbfm. */
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break;
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case 502: /* bfxil */
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case 501: /* bfi */
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value = 500; /* --> bfm. */
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break;
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case 507: /* uxth */
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case 506: /* uxtb */
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case 509: /* lsr */
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case 508: /* lsl */
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case 505: /* ubfx */
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case 504: /* ubfiz */
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value = 503; /* --> ubfm. */
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break;
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case 527: /* cset */
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case 526: /* cinc */
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value = 525; /* --> csinc. */
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break;
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case 530: /* csetm */
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case 529: /* cinv */
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value = 528; /* --> csinv. */
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break;
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case 532: /* cneg */
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value = 531; /* --> csneg. */
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break;
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case 557: /* lsl */
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value = 556; /* --> lslv. */
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break;
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case 559: /* lsr */
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value = 558; /* --> lsrv. */
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break;
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case 561: /* asr */
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value = 560; /* --> asrv. */
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break;
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case 563: /* ror */
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value = 562; /* --> rorv. */
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break;
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case 573: /* mul */
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value = 572; /* --> madd. */
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break;
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case 575: /* mneg */
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value = 574; /* --> msub. */
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break;
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case 577: /* smull */
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value = 576; /* --> smaddl. */
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break;
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case 579: /* smnegl */
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value = 578; /* --> smsubl. */
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break;
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case 582: /* umull */
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value = 581; /* --> umaddl. */
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break;
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case 584: /* umnegl */
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value = 583; /* --> umsubl. */
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break;
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case 595: /* ror */
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value = 594; /* --> extr. */
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break;
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case 695: /* strb */
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value = 693; /* --> sturb. */
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break;
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case 696: /* ldrb */
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value = 694; /* --> ldurb. */
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break;
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case 698: /* ldrsb */
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value = 697; /* --> ldursb. */
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break;
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case 701: /* str */
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value = 699; /* --> stur. */
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break;
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case 702: /* ldr */
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value = 700; /* --> ldur. */
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break;
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case 705: /* strh */
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value = 703; /* --> sturh. */
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break;
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case 706: /* ldrh */
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value = 704; /* --> ldurh. */
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break;
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case 708: /* ldrsh */
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value = 707; /* --> ldursh. */
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break;
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case 711: /* str */
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value = 709; /* --> stur. */
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break;
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case 712: /* ldr */
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value = 710; /* --> ldur. */
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break;
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case 714: /* ldrsw */
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value = 713; /* --> ldursw. */
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break;
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case 716: /* prfm */
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value = 715; /* --> prfum. */
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break;
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case 758: /* bic */
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value = 757; /* --> and. */
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break;
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case 760: /* mov */
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value = 759; /* --> orr. */
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break;
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case 763: /* tst */
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value = 762; /* --> ands. */
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break;
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case 768: /* uxtw */
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case 767: /* mov */
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value = 766; /* --> orr. */
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break;
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case 770: /* mvn */
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value = 769; /* --> orn. */
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break;
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case 774: /* tst */
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value = 773; /* --> ands. */
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break;
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case 777: /* mov */
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value = 776; /* --> movn. */
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break;
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case 779: /* mov */
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value = 778; /* --> movz. */
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break;
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case 790: /* sevl */
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case 789: /* sev */
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case 788: /* wfi */
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case 787: /* wfe */
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case 786: /* yield */
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case 785: /* nop */
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value = 784; /* --> hint. */
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break;
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case 799: /* tlbi */
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case 798: /* ic */
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case 797: /* dc */
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case 796: /* at */
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value = 795; /* --> sys. */
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break;
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default: return NULL;
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}
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return aarch64_opcode_table + value;
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}
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const char*
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aarch64_insert_operand (const aarch64_operand *self,
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const aarch64_opnd_info *info,
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aarch64_insn *code, const aarch64_inst *inst)
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{
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/* Use the index as the key. */
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int key = self - aarch64_operands;
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switch (key)
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{
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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case 6:
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case 7:
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case 8:
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case 9:
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case 10:
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case 13:
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case 14:
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case 15:
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case 16:
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case 18:
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case 19:
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case 20:
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case 21:
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case 22:
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case 23:
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case 24:
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case 25:
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case 26:
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case 34:
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case 35:
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return aarch64_ins_regno (self, info, code, inst);
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case 11:
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return aarch64_ins_reg_extended (self, info, code, inst);
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case 12:
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return aarch64_ins_reg_shifted (self, info, code, inst);
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case 17:
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return aarch64_ins_ft (self, info, code, inst);
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case 27:
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case 28:
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case 29:
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return aarch64_ins_reglane (self, info, code, inst);
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case 30:
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return aarch64_ins_reglist (self, info, code, inst);
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case 31:
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return aarch64_ins_ldst_reglist (self, info, code, inst);
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case 32:
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return aarch64_ins_ldst_reglist_r (self, info, code, inst);
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case 33:
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return aarch64_ins_ldst_elemlist (self, info, code, inst);
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case 36:
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case 45:
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case 46:
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case 47:
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case 48:
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case 49:
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case 50:
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case 51:
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case 52:
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case 53:
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case 54:
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case 55:
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case 56:
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case 57:
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case 66:
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case 67:
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case 68:
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case 69:
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return aarch64_ins_imm (self, info, code, inst);
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case 37:
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case 38:
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return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
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case 39:
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case 40:
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case 41:
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return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
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case 58:
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return aarch64_ins_limm (self, info, code, inst);
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case 59:
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return aarch64_ins_aimm (self, info, code, inst);
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case 60:
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return aarch64_ins_imm_half (self, info, code, inst);
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case 61:
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return aarch64_ins_fbits (self, info, code, inst);
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case 63:
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case 64:
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return aarch64_ins_cond (self, info, code, inst);
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case 70:
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case 76:
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return aarch64_ins_addr_simple (self, info, code, inst);
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case 71:
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return aarch64_ins_addr_regoff (self, info, code, inst);
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case 72:
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case 73:
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case 74:
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return aarch64_ins_addr_simm (self, info, code, inst);
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case 75:
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return aarch64_ins_addr_uimm12 (self, info, code, inst);
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case 77:
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return aarch64_ins_simd_addr_post (self, info, code, inst);
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case 78:
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return aarch64_ins_sysreg (self, info, code, inst);
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case 79:
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return aarch64_ins_pstatefield (self, info, code, inst);
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case 80:
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case 81:
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case 82:
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case 83:
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return aarch64_ins_sysins_op (self, info, code, inst);
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case 84:
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case 85:
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return aarch64_ins_barrier (self, info, code, inst);
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case 86:
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return aarch64_ins_prfop (self, info, code, inst);
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default: assert (0); abort ();
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}
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}
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