40a5538e94
(dsp.o): New dependency. (IGEN_INCLUDE): Add dsp.igen. * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*, mipsisa64*-*-*): Add dsp to sim_igen_machine. * configure: Regenerate. * mips.igen: Add dsp model and include dsp.igen. (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2, because these instructions are extended in DSP ASE. * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of adding 6 DSP accumulator registers and 1 DSP control register. (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX, AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT, DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK, DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK, DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK, DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK, DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6, DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK, DSPCR_CCOND_SMASK): New define. (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators. * dsp.c, dsp.igen: New files for MIPS DSP ASE.
437 lines
12 KiB
Text
437 lines
12 KiB
Text
dnl Process this file with autoconf to produce a configure script.
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AC_PREREQ(2.59)dnl
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AC_INIT(Makefile.in)
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AC_CONFIG_HEADER(config.h:config.in)
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sinclude(../common/aclocal.m4)
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# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
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# it by inlining the macro's contents.
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sinclude(../common/common.m4)
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dnl Options available in this module
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SIM_AC_OPTION_INLINE()
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SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
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SIM_AC_OPTION_HOSTENDIAN
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SIM_AC_OPTION_WARNINGS
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SIM_AC_OPTION_RESERVED_BITS(1)
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# DEPRECATED
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#
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# Instead of defining a `subtarget' macro, code should be checking
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# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
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# in question.
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#
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case "${target}" in
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mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
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mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
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mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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*) SIM_SUBTARGET="";;
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esac
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AC_SUBST(SIM_SUBTARGET)
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#
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# Select the byte order of the target
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#
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mips_endian=
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default_endian=
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case "${target}" in
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mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
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mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
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mips64*-*-*) default_endian=BIG_ENDIAN ;;
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mips16*-*-*) default_endian=BIG_ENDIAN ;;
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mipsisa32*-*-*) default_endian=BIG_ENDIAN ;;
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mipsisa64*-*-*) default_endian=BIG_ENDIAN ;;
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mips*-*-*) default_endian=BIG_ENDIAN ;;
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*) default_endian=BIG_ENDIAN ;;
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esac
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SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
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#
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# Select the bitsize of the target
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#
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mips_addr_bitsize=
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case "${target}" in
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mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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*) mips_bitsize=64 ; mips_msb=63 ;;
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esac
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SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
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#
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# Select the floating hardware support of the target
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#
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mips_fpu=HARDWARE_FLOATING_POINT
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mips_fpu_bitsize=
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case "${target}" in
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mips*tx39*) mips_fpu=HARD_FLOATING_POINT
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mips_fpu_bitsize=32
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;;
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mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
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*) mips_fpu=HARD_FLOATING_POINT ;;
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esac
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SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
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#
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# Select the level of SMP support
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#
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case "${target}" in
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*) mips_smp=0 ;;
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esac
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SIM_AC_OPTION_SMP($mips_smp)
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#
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# Select the IGEN architecture
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#
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sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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sim_mach_default="mips8000"
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case "${target}" in
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mips*tx39*) sim_gen=IGEN
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sim_igen_filter="32,f"
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sim_igen_machine="-M r3900"
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;;
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mips64vr43*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_mach_default="mips8000"
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;;
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mips64vr5*-*-*) sim_gen=IGEN
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sim_igen_machine="-M vr5000"
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sim_mach_default="mips5000"
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;;
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mips64vr41*) sim_gen=M16
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sim_igen_machine="-M vr4100"
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sim_m16_machine="-M vr4100"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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sim_mach_default="mips4100"
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;;
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mips64vr-*-* | mips64vrel-*-*)
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sim_gen=MULTI
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sim_multi_configs="\
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vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
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vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
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vr5000:mipsIV:32,64,f:mips4300,mips5000\
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vr5400:mipsIV,vr5400:32,64,f:mips5400\
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vr5500:mipsIV,vr5500:32,64,f:mips5500"
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sim_multi_default=mips5000
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;;
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mips64*-*-*) sim_igen_filter="32,64,f"
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sim_gen=IGEN
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;;
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mips16*-*-*) sim_gen=M16
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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;;
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mipsisa32r2*-*-*) sim_gen=M16
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sim_igen_machine="-M mips32r2,mips16,mips16e,dsp"
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sim_m16_machine="-M mips16,mips16e,mips32r2"
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sim_igen_filter="32,f"
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sim_mach_default="mipsisa32r2"
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;;
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mipsisa32*-*-*) sim_gen=M16
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sim_igen_machine="-M mips32,mips16,mips16e,dsp"
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sim_m16_machine="-M mips16,mips16e,mips32"
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sim_igen_filter="32,f"
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sim_mach_default="mipsisa32"
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;;
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mipsisa64r2*-*-*) sim_gen=M16
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sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,dsp"
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sim_m16_machine="-M mips16,mips16e,mips64r2"
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sim_igen_filter="32,64,f"
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sim_mach_default="mipsisa64r2"
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;;
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mipsisa64sb1*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips64,mips3d,sb1"
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sim_igen_filter="32,64,f"
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sim_mach_default="mips_sb1"
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;;
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mipsisa64*-*-*) sim_gen=M16
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sim_igen_machine="-M mips64,mips3d,mips16,mips16e,dsp"
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sim_m16_machine="-M mips16,mips16e,mips64"
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sim_igen_filter="32,64,f"
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sim_mach_default="mipsisa64"
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;;
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mips*lsi*) sim_gen=M16
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sim_igen_machine="-M mipsIII,mips16"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,f"
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sim_m16_filter="16"
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sim_mach_default="mips4000"
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;;
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mips*-*-*) sim_gen=IGEN
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sim_igen_filter="32,f"
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;;
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esac
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# The MULTI generator can combine several simulation engines into one.
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# executable. A configuration which uses the MULTI should set two
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# variables: ${sim_multi_configs} and ${sim_multi_default}.
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#
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# ${sim_multi_configs} is the list of engines to build. Each
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# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
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# where:
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#
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# - NAME is a C-compatible prefix for the engine,
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# - MACHINE is a -M argument,
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# - FILTER is a -F argument, and
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# - BFDMACHS is a comma-separated list of bfd machines that the
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# simulator can run.
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#
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# Each entry will have a separate simulation engine whose prefix is
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# m32<NAME>. If the machine list includes "mips16", there will also
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# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
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# generated using the same machine list as the 32-bit version,
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# but the filter will be "16" instead of FILTER.
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#
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# The simulator compares the bfd mach against BFDMACHS to decide
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# which engine to use. Entries in BFDMACHS should be bfd_mach
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# values with "bfd_mach_" removed. ${sim_multi_default} says
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# which entry should be the default.
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if test ${sim_gen} = MULTI; then
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# Simple sanity check.
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if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
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AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly)
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fi
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# Start in a known state.
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rm -f multi-include.h multi-run.c
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sim_multi_flags=
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sim_multi_src=
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sim_multi_obj=multi-run.o
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sim_multi_igen_configs=
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sim_seen_default=no
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cat << __EOF__ > multi-run.c
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/* Main entry point for MULTI simulators.
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Copyright (C) 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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--
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This file was generated by sim/mips/configure. */
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#include "sim-main.h"
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#include "multi-include.h"
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#define SD sd
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#define CPU cpu
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void
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sim_engine_run (SIM_DESC sd,
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int next_cpu_nr,
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int nr_cpus,
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int signal) /* ignore */
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{
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int mach;
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if (STATE_ARCHITECTURE (sd) == NULL)
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mach = bfd_mach_${sim_multi_default};
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else
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mach = STATE_ARCHITECTURE (SD)->mach;
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switch (mach)
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{
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__EOF__
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for fc in ${sim_multi_configs}; do
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# Split up the entry. ${c} contains the first three elements.
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# Note: outer sqaure brackets are m4 quotes.
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c=`echo ${fc} | sed ['s/:[^:]*$//']`
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bfdmachs=`echo ${fc} | sed 's/.*://'`
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name=`echo ${c} | sed 's/:.*//'`
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machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
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filter=`echo ${c} | sed 's/.*://'`
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# Build the following lists:
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#
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# sim_multi_flags: all -M and -F flags used by the simulator
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# sim_multi_src: all makefile-generated source files
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# sim_multi_obj: the objects for ${sim_multi_src}
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# sim_multi_igen_configs: igen configuration strings.
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#
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# Each entry in ${sim_multi_igen_configs} is a prefix (m32
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# or m16) followed by the NAME, MACHINE and FILTER part of
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# the ${sim_multi_configs} entry.
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sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
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# Check whether mips16 handling is needed.
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case ${c} in
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*:*mips16*:*)
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# Run igen twice, once for normal mode and once for mips16.
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ws="m32 m16"
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# The top-level function for the mips16 simulator is
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# in a file m16${name}_run.c, generated by the
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# tmp-run-multi Makefile rule.
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sim_multi_src="${sim_multi_src} m16${name}_run.c"
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sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
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sim_multi_flags="${sim_multi_flags} -F 16"
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;;
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*)
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ws=m32
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;;
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esac
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# Now add the list of igen-generated files to ${sim_multi_src}
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# and ${sim_multi_obj}.
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for w in ${ws}; do
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for base in engine icache idecode model semantics support; do
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sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
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sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
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sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
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done
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sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
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done
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# Add an include for the engine.h file. This file declares the
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# top-level foo_engine_run() function.
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echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
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# Add case statements for this engine to sim_engine_run().
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for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
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echo " case bfd_mach_${mach}:" >> multi-run.c
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if test ${mach} = ${sim_multi_default}; then
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echo " default:" >> multi-run.c
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sim_seen_default=yes
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fi
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done
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echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
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>> multi-run.c
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echo " break;" >> multi-run.c
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done
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# Check whether we added a 'default:' label.
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if test ${sim_seen_default} = no; then
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AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
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fi
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cat << __EOF__ >> multi-run.c
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}
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}
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int
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mips_mach_multi (SIM_DESC sd)
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{
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if (STATE_ARCHITECTURE (sd) == NULL)
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return bfd_mach_${sim_multi_default};
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switch (STATE_ARCHITECTURE (SD)->mach)
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{
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__EOF__
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# Add case statements for this engine to mips_mach_multi().
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for fc in ${sim_multi_configs}; do
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# Split up the entry. ${c} contains the first three elements.
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# Note: outer sqaure brackets are m4 quotes.
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c=`echo ${fc} | sed ['s/:[^:]*$//']`
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bfdmachs=`echo ${fc} | sed 's/.*://'`
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for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
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echo " case bfd_mach_${mach}:" >> multi-run.c
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done
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done
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cat << __EOF__ >> multi-run.c
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return (STATE_ARCHITECTURE (SD)->mach);
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default:
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return bfd_mach_${sim_multi_default};
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}
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}
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__EOF__
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SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
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else
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# For clean-extra
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sim_multi_src=doesnt-exist.c
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if test x"${sim_mach_default}" = x""; then
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AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined)
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fi
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SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
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fi
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sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
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sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
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AC_SUBST(sim_igen_flags)
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AC_SUBST(sim_m16_flags)
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AC_SUBST(sim_gen)
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AC_SUBST(sim_multi_flags)
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AC_SUBST(sim_multi_igen_configs)
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AC_SUBST(sim_multi_src)
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AC_SUBST(sim_multi_obj)
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#
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# Add simulated hardware devices
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#
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hw_enabled=no
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case "${target}" in
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mips*tx39*)
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hw_enabled=yes
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hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
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mips_extra_objs="dv-sockser.o"
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SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
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;;
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*)
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mips_extra_objs=""
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;;
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esac
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SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
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AC_SUBST(mips_extra_objs)
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# Choose simulator engine
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case "${target}" in
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*) mips_igen_engine="engine.o"
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;;
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esac
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AC_SUBST(mips_igen_engine)
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AC_PATH_X
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mips_extra_libs=""
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AC_SUBST(mips_extra_libs)
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AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
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AC_CHECK_LIB(m, fabs)
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AC_CHECK_FUNCS(aint anint sqrt)
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SIM_AC_OUTPUT
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