4670103e86
gas/
2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
Janek van Oirschot <jvanoirs@synopsys.com>
* config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
(MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
Define.
(arc_flags, arc_relax_type): New structure.
* config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
(RELAX_TABLE_ENTRY_MAX): New define.
(relaxation_state, md_relax_table, arc_relaxable_insns)
(arc_num_relaxable_ins): New variable.
(rlx_operand_type, arc_rlx_types): New enums.
(arc_relaxable_ins): New structure.
(OPTION_RELAX): New option.
(arc_insn): New relax member.
(arc_flags): Remove.
(relax_insn_p): New function.
(apply_fixups): Likewise.
(relaxable_operand): Likewise.
(may_relax_expr): Likewise.
(relaxable_flag): Likewise.
(arc_pcrel_adjust): Likewise.
(md_estimate_size_before_relax): Implement.
(md_convert_frag): Likewise.
(md_parse_option): Handle new mrelax option.
(md_show_usage): Likewise.
(assemble_insn): Set relax member.
(emit_insn0): New function.
(emit_insn1): Likewise.
(emit_insn): Handle relaxation case.
* NEWS: Mention the new relaxation option.
* doc/c-arc.texi (ARC Options): Document new mrelax option.
gas/testsuite
2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
* gas/arc/relax-avoid1.d: New file.
* gas/arc/relax-avoid1.s: Likewise.
* gas/arc/relax-avoid2.d: Likewise.
* gas/arc/relax-avoid2.s: Likewise.
* gas/arc/relax-avoid3.d: Likewise.
* gas/arc/relax-avoid3.s: Likewise.
* gas/arc/relax-b.d: Likewise.
* gas/arc/relax-b.s: Likewise.
include/opcode/
2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
Janek van Oirschot <jvanoirs@synopsys.com>
* arc.h (arc_opcode arc_relax_opcodes, arc_num_relax_opcodes):
Declare.
opcodes/
2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
Janek van Oirschot <jvanoirs@synopsys.com>
* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
variable.
429 lines
13 KiB
Text
429 lines
13 KiB
Text
@c Copyright (C) 2000-2016 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node ARC-Dependent
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@chapter ARC Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter ARC Dependent Features
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@end ifclear
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@set ARC_CORE_DEFAULT 6
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@cindex ARC support
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@menu
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* ARC Options:: Options
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* ARC Syntax:: Syntax
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* ARC Directives:: ARC Machine Directives
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* ARC Modifiers:: ARC Assembler Modifiers
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* ARC Symbols:: ARC Pre-defined Symbols
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* ARC Opcodes:: Opcodes
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@end menu
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@node ARC Options
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@section Options
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@cindex ARC options
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@cindex options for ARC
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The following options control the type of CPU for which code is
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assembled, and generic constraints on the code generated:
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@table @code
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@item -mcpu=@var{cpu}
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@cindex @code{-mcpu=@var{cpu}} command line option, ARC
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Set architecture type and register usage for @var{cpu}. There are
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also shortcut alias options available for backward compatibility and
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convenience. Supported values for @var{cpu} are
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@table @code
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@cindex @code{mA6} command line option, ARC
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@cindex @code{marc600} command line option, ARC
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@item arc600
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Assemble for ARC 600. Aliases: @code{-mA6}, @code{-mARC600}.
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@item arc601
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@cindex @code{mARC601} command line option, ARC
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Assemble for ARC 601. Alias: @code{-mARC601}.
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@item arc700
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@cindex @code{mA7} command line option, ARC
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@cindex @code{mARC700} command line option, ARC
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Assemble for ARC 700. Aliases: @code{-mA7}, @code{-mARC700}.
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@item arcem
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@cindex @code{mEM} command line option, ARC
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Assemble for ARC EM. Aliases: @code{-mEM}
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@item archs
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@cindex @code{mHS} command line option, ARC
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Assemble for ARC HS. Aliases: @code{-mHS}, @code{-mav2hs}.
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@end table
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Note: the @code{.cpu} directive can to be used to select a core
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variant from within assembly code.
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@cindex @code{-EB} command line option, ARC
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@item -EB
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This option specifies that the output generated by the assembler should
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be marked as being encoded for a big-endian processor.
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@cindex @code{-EL} command line option, ARC
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@item -EL
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This option specifies that the output generated by the assembler should
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be marked as being encoded for a little-endian processor - this is the
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default.
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@cindex @code{-mcode-density} command line option, ARC
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@item -mcode-density
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This option turns on Code Density instructions. Only valid for ARC EM
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processors.
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@cindex @code{-mrelax} command line option, ARC
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@item -mrelax
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Enable support for assembly-time relaxation. The assembler will
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replace a longer version of an instruction with a shorter one,
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whenever it is possible.
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@end table
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@node ARC Syntax
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@section Syntax
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@menu
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* ARC-Chars:: Special Characters
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* ARC-Regs:: Register Names
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@end menu
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@node ARC-Chars
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@subsection Special Characters
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@table @code
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@item %
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@cindex register name prefix character, ARC
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@cindex ARC register name prefix character
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A register name can optionally be prefixed by a @samp{%} character. So
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register @code{%r0} is equivalent to @code{r0} in the assembly code.
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@item #
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@cindex line comment character, ARC
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@cindex ARC line comment character
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The presence of a @samp{#} character within a line (but not at the
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start of a line) indicates the start of a comment that extends to the
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end of the current line.
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@emph{Note:} if a line starts with a @samp{#} character then it can
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also be a logical line number directive (@pxref{Comments}) or a
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preprocessor control command (@pxref{Preprocessing}).
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@item @@
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@cindex symbol prefix character, ARC
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@cindex ARC symbol prefix character
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Prefixing an operand with an @samp{@@} specifies that the operand is a
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symbol and not a register. This is how the assembler disambiguates
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the use of an ARC register name as a symbol. So the instruction
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@example
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mov r0, @@r0
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@end example
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moves the address of symbol @code{r0} into register @code{r0}.
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@item `
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@cindex line separator, ARC
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@cindex statement separator, ARC
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@cindex ARC line separator
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The @samp{`} (backtick) character is used to separate statements on a
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single line.
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@cindex line
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@item -
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@cindex C preprocessor macro separator, ARC
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@cindex ARC C preprocessor macro separator
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Used as a separator to obtain a sequence of commands from a C
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preprocessor macro.
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@end table
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@node ARC-Regs
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@subsection Register Names
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@cindex ARC register names
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@cindex register names, ARC
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The ARC assembler uses the following register names for its core
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registers:
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@table @code
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@item r0-r31
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@cindex core general registers, ARC
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@cindex ARC core general registers
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The core general registers. Registers @code{r26} through @code{r31}
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have special functions, and are usually referred to by those synonyms.
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@item gp
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@cindex global pointer, ARC
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@cindex ARC global pointer
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The global pointer and a synonym for @code{r26}.
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@item fp
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@cindex frame pointer, ARC
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@cindex ARC frame pointer
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The frame pointer and a synonym for @code{r27}.
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@item sp
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@cindex stack pointer, ARC
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@cindex ARC stack pointer
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The stack pointer and a synonym for @code{r28}.
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@item ilink1
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@cindex level 1 interrupt link register, ARC
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@cindex ARC level 1 interrupt link register
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For ARC 600 and ARC 700, the level 1 interrupt link register and a
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synonym for @code{r29}. Not supported for ARCv2.
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@item ilink
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@cindex interrupt link register, ARC
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@cindex ARC interrupt link register
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For ARCv2, the interrupt link register and a synonym for @code{r29}.
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Not supported for ARC 600 and ARC 700.
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@item ilink2
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@cindex level 2 interrupt link register, ARC
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@cindex ARC level 2 interrupt link register
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For ARC 600 and ARC 700, the level 2 interrupt link register and a
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synonym for @code{r30}. Not supported for ARC v2.
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@item blink
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@cindex link register, ARC
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@cindex ARC link register
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The link register and a synonym for @code{r31}.
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@item r32-r59
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@cindex extension core registers, ARC
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@cindex ARC extension core registers
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The extension core registers.
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@item lp_count
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@cindex loop counter, ARC
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@cindex ARC loop counter
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The loop count register.
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@item pcl
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@cindex word aligned program counter, ARC
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@cindex ARC word aligned program counter
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The word aligned program counter.
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@end table
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In addition the ARC processor has a large number of @emph{auxiliary
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registers}. The precise set depends on the extensions being
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supported, but the following baseline set are always defined:
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@table @code
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@item identity
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@cindex Processor Identification register, ARC
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@cindex ARC Processor Identification register
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Processor Identification register. Auxiliary register address 0x4.
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@item pc
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@cindex Program Counter, ARC
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@cindex ARC Program Counter
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Program Counter. Auxiliary register address 0x6.
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@item status32
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@cindex Status register, ARC
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@cindex ARC Status register
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Status register. Auxiliary register address 0x0a.
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@item bta
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@cindex Branch Target Address, ARC
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@cindex ARC Branch Target Address
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Branch Target Address. Auxiliary register address 0x412.
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@item ecr
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@cindex Exception Cause Register, ARC
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@cindex ARC Exception Cause Register
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Exception Cause Register. Auxiliary register address 0x403.
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@item int_vector_base
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@cindex Interrupt Vector Base address, ARC
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@cindex ARC Interrupt Vector Base address
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Interrupt Vector Base address. Auxiliary register address 0x25.
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@item status32_p0
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@cindex Stored STATUS32 register on entry to level P0 interrupts, ARC
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@cindex ARC Stored STATUS32 register on entry to level P0 interrupts
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Stored STATUS32 register on entry to level P0 interrupts. Auxiliary
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register address 0xb.
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@item aux_user_sp
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@cindex Saved User Stack Pointer, ARC
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@cindex ARC Saved User Stack Pointer
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Saved User Stack Pointer. Auxiliary register address 0xd.
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@item eret
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@cindex Exception Return Address, ARC
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@cindex ARC Exception Return Address
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Exception Return Address. Auxiliary register address 0x400.
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@item erbta
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@cindex BTA saved on exception entry, ARC
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@cindex ARC BTA saved on exception entry
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BTA saved on exception entry. Auxiliary register address 0x401.
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@item erstatus
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@cindex STATUS32 saved on exception, ARC
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@cindex ARC STATUS32 saved on exception
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STATUS32 saved on exception. Auxiliary register address 0x402.
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@item bcr_ver
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@cindex Build Configuration Registers Version, ARC
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@cindex ARC Build Configuration Registers Version
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Build Configuration Registers Version. Auxiliary register address 0x60.
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@item bta_link_build
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@cindex Build configuration for: BTA Registers, ARC
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@cindex ARC Build configuration for: BTA Registers
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Build configuration for: BTA Registers. Auxiliary register address 0x63.
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@item vecbase_ac_build
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@cindex Build configuration for: Interrupts, ARC
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@cindex ARC Build configuration for: Interrupts
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Build configuration for: Interrupts. Auxiliary register address 0x68.
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@item rf_build
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@cindex Build configuration for: Core Registers, ARC
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@cindex ARC Build configuration for: Core Registers
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Build configuration for: Core Registers. Auxiliary register address 0x6e.
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@item dccm_build
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@cindex DCCM RAM Configuration Register, ARC
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@cindex ARC DCCM RAM Configuration Register
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DCCM RAM Configuration Register. Auxiliary register address 0xc1.
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@end table
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Additional auxiliary register names are defined according to the
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processor architecture version and extensions selected by the options.
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@node ARC Directives
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@section ARC Machine Directives
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@cindex machine directives, ARC
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@cindex ARC machine directives
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The ARC version of @code{@value{AS}} supports the following additional
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machine directives:
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@table @code
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@cindex @code{lcomm} directive
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@item .lcomm @var{symbol} , @var{length}[, @var{alignment}]
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Reserve @var{length} (an absolute expression) bytes for a local common
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denoted by @var{symbol}. The section and value of @var{symbol} are
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those of the new local common. The addresses are allocated in the bss
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section, so that at run-time the bytes start off zeroed. Since
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@var{symbol} is not declared global, it is normally not visible to
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@code{@value{LD}}. The optional third parameter, @var{alignment},
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specifies the desired alignment of the symbol in the bss section,
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specified as a byte boundary (for example, an alignment of 16 means
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that the least significant 4 bits of the address should be zero). The
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alignment must be an absolute expression, and it must be a power of
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two. If no alignment is specified, as will set the alignment to the
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largest power of two less than or equal to the size of the symbol, up
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to a maximum of 16.
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@cindex @code{lcommon} directive
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@item .lcommon @var{symbol} , @var{length}[, @var{alignment}]
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The same as @code{lcomm} directive.
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@cindex @code{cpu} directive, ARC
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@cindex @code{cpu} directive, ARC
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The @code{.cpu} directive must be followed by the desired core
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version. Permitted values for CPU are:
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@table @code
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@item ARC600
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Assemble for the ARC600 instruction set.
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@item ARC700
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Assemble for the ARC700 instruction set.
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@item EM
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Assemble for the ARC EM instruction set.
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@item HS
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Assemble for the ARC HS instruction set.
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@end table
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Note: the @code{.cpu} directive overrides the command line option
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@code{-mcpu=@var{cpu}}; a warning is emitted when the version is not
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consistent between the two.
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@end table
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@node ARC Modifiers
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@section ARC Assembler Modifiers
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The following additional assembler modifiers have been added for
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position-independent code. These modifiers are available only with
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the ARC 700 and above processors and generate relocation entries,
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which are interpreted by the linker as follows:
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@table @code
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@item @@pcl(@var{symbol})
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@cindex @@pcl(@var{symbol}), ARC modifier
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Relative distance of @var{symbol}'s from the current program counter
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location.
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@item @@gotpc(@var{symbol})
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@cindex @@gotpc(@var{symbol}), ARC modifier
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Relative distance of @var{symbol}'s Global Offset Table entry from the
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current program counter location.
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@item @@gotoff(@var{symbol})
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@cindex @@gotoff(@var{symbol}), ARC modifier
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Distance of @var{symbol} from the base of the Global Offset Table.
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@item @@plt(@var{symbol})
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@cindex @@plt(@var{symbol}), ARC modifier
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Distance of @var{symbol}'s Procedure Linkage Table entry from the
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current program counter. This is valid only with branch and link
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instructions and PC-relative calls.
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@item @@sda(@var{symbol})
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@cindex @@sda(@var{symbol}), ARC modifier
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Relative distance of @var{symbol} from the base of the Small Data
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Pointer.
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@end table
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@node ARC Symbols
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@section ARC Pre-defined Symbols
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The following assembler symbols will prove useful when developing
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position-independent code. These symbols are available only with the
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ARC 700 and above processors.
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@table @code
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@item __GLOBAL_OFFSET_TABLE__
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@cindex __GLOBAL_OFFSET_TABLE__, ARC pre-defined symbol
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Symbol referring to the base of the Global Offset Table.
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@item __DYNAMIC__
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@cindex __DYNAMIC__, ARC pre-defined symbol
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An alias for the Global Offset Table
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@code{Base__GLOBAL_OFFSET_TABLE__}. It can be used only with
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@code{@@gotpc} modifiers.
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@end table
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@node ARC Opcodes
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@section Opcodes
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@cindex ARC opcodes
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@cindex opcodes for ARC
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For information on the ARC instruction set, see @cite{ARC Programmers
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Reference Manual}, available where you download the processor IP library.
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