340 lines
9.4 KiB
Text
340 lines
9.4 KiB
Text
@c Copyright (C) 2000-2014 Free Software Foundation, Inc.
|
|
@c This is part of the GAS manual.
|
|
@c For copying conditions, see the file as.texinfo.
|
|
|
|
@ifset GENERIC
|
|
@page
|
|
@node ARC-Dependent
|
|
@chapter ARC Dependent Features
|
|
@end ifset
|
|
|
|
@ifclear GENERIC
|
|
@node Machine Dependencies
|
|
@chapter ARC Dependent Features
|
|
@end ifclear
|
|
|
|
@set ARC_CORE_DEFAULT 6
|
|
|
|
@cindex ARC support
|
|
@menu
|
|
* ARC Options:: Options
|
|
* ARC Syntax:: Syntax
|
|
* ARC Floating Point:: Floating Point
|
|
* ARC Directives:: ARC Machine Directives
|
|
* ARC Opcodes:: Opcodes
|
|
@end menu
|
|
|
|
|
|
@node ARC Options
|
|
@section Options
|
|
@cindex ARC options (none)
|
|
@cindex options for ARC (none)
|
|
|
|
@table @code
|
|
|
|
@cindex @code{-marc[5|6|7|8]} command line option, ARC
|
|
@item -marc[5|6|7|8]
|
|
This option selects the core processor variant. Using
|
|
@code{-marc} is the same as @code{-marc@value{ARC_CORE_DEFAULT}}, which
|
|
is also the default.
|
|
|
|
@table @code
|
|
|
|
@cindex @code{arc5} arc5, ARC
|
|
@item arc5
|
|
Base instruction set.
|
|
|
|
@cindex @code{arc6} arc6, ARC
|
|
@item arc6
|
|
Jump-and-link (jl) instruction. No requirement of an instruction between
|
|
setting flags and conditional jump. For example:
|
|
|
|
@smallexample
|
|
mov.f r0,r1
|
|
beq foo
|
|
@end smallexample
|
|
|
|
@cindex @code{arc7} arc7, ARC
|
|
@item arc7
|
|
Break (brk) and sleep (sleep) instructions.
|
|
|
|
@cindex @code{arc8} arc8, ARC
|
|
@item arc8
|
|
Software interrupt (swi) instruction.
|
|
|
|
@end table
|
|
|
|
Note: the @code{.option} directive can to be used to select a core
|
|
variant from within assembly code.
|
|
|
|
@cindex @code{-EB} command line option, ARC
|
|
@item -EB
|
|
This option specifies that the output generated by the assembler should
|
|
be marked as being encoded for a big-endian processor.
|
|
|
|
@cindex @code{-EL} command line option, ARC
|
|
@item -EL
|
|
This option specifies that the output generated by the assembler should
|
|
be marked as being encoded for a little-endian processor - this is the
|
|
default.
|
|
|
|
@end table
|
|
|
|
@node ARC Syntax
|
|
@section Syntax
|
|
@menu
|
|
* ARC-Chars:: Special Characters
|
|
* ARC-Regs:: Register Names
|
|
@end menu
|
|
|
|
@node ARC-Chars
|
|
@subsection Special Characters
|
|
|
|
@cindex line comment character, ARC
|
|
@cindex ARC line comment character
|
|
The presence of a @samp{#} on a line indicates the start of a comment
|
|
that extends to the end of the current line. Note that if a line
|
|
starts with a @samp{#} character then it can also be a logical line
|
|
number directive (@pxref{Comments}) or a preprocessor
|
|
control command (@pxref{Preprocessing}).
|
|
|
|
@cindex line separator, ARC
|
|
@cindex statement separator, ARC
|
|
@cindex ARC line separator
|
|
The ARC assembler does not support a line separator character.
|
|
|
|
@node ARC-Regs
|
|
@subsection Register Names
|
|
|
|
@cindex ARC register names
|
|
@cindex register names, ARC
|
|
*TODO*
|
|
|
|
|
|
@node ARC Floating Point
|
|
@section Floating Point
|
|
|
|
@cindex floating point, ARC (@sc{ieee})
|
|
@cindex ARC floating point (@sc{ieee})
|
|
The ARC core does not currently have hardware floating point
|
|
support. Software floating point support is provided by @code{GCC}
|
|
and uses @sc{ieee} floating-point numbers.
|
|
|
|
|
|
@node ARC Directives
|
|
@section ARC Machine Directives
|
|
|
|
@cindex machine directives, ARC
|
|
@cindex ARC machine directives
|
|
The ARC version of @code{@value{AS}} supports the following additional
|
|
machine directives:
|
|
|
|
@table @code
|
|
|
|
@cindex @code{2byte} directive, ARC
|
|
@item .2byte @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{3byte} directive, ARC
|
|
@item .3byte @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{4byte} directive, ARC
|
|
@item .4byte @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{extAuxRegister} directive, ARC
|
|
@item .extAuxRegister @var{name},@var{address},@var{mode}
|
|
The ARCtangent A4 has extensible auxiliary register space. The
|
|
auxiliary registers can be defined in the assembler source code by
|
|
using this directive. The first parameter is the @var{name} of the
|
|
new auxiallry register. The second parameter is the @var{address} of
|
|
the register in the auxiliary register memory map for the variant of
|
|
the ARC. The third parameter specifies the @var{mode} in which the
|
|
register can be operated is and it can be one of:
|
|
|
|
@table @code
|
|
@item r (readonly)
|
|
@item w (write only)
|
|
@item r|w (read or write)
|
|
@end table
|
|
|
|
For example:
|
|
|
|
@smallexample
|
|
.extAuxRegister mulhi,0x12,w
|
|
@end smallexample
|
|
|
|
This specifies an extension auxiliary register called @emph{mulhi}
|
|
which is at address 0x12 in the memory space and which is only
|
|
writable.
|
|
|
|
@cindex @code{extCondCode} directive, ARC
|
|
@item .extCondCode @var{suffix},@var{value}
|
|
The condition codes on the ARCtangent A4 are extensible and can be
|
|
specified by means of this assembler directive. They are specified
|
|
by the suffix and the value for the condition code. They can be used to
|
|
specify extra condition codes with any values. For example:
|
|
|
|
@smallexample
|
|
.extCondCode is_busy,0x14
|
|
|
|
add.is_busy r1,r2,r3
|
|
bis_busy _main
|
|
@end smallexample
|
|
|
|
@cindex @code{extCoreRegister} directive, ARC
|
|
@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
|
|
Specifies an extension core register @var{name} for the application.
|
|
This allows a register @var{name} with a valid @var{regnum} between 0
|
|
and 60, with the following as valid values for @var{mode}
|
|
|
|
@table @samp
|
|
@item @emph{r} (readonly)
|
|
@item @emph{w} (write only)
|
|
@item @emph{r|w} (read or write)
|
|
@end table
|
|
|
|
|
|
The other parameter gives a description of the register having a
|
|
@var{shortcut} in the pipeline. The valid values are:
|
|
|
|
@table @code
|
|
@item can_shortcut
|
|
@item cannot_shortcut
|
|
@end table
|
|
|
|
For example:
|
|
|
|
@smallexample
|
|
.extCoreRegister mlo,57,r,can_shortcut
|
|
@end smallexample
|
|
|
|
This defines an extension core register mlo with the value 57 which
|
|
can shortcut the pipeline.
|
|
|
|
@cindex @code{extInstruction} directive, ARC
|
|
@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
|
|
The ARCtangent A4 allows the user to specify extension instructions.
|
|
The extension instructions are not macros. The assembler creates
|
|
encodings for use of these instructions according to the specification
|
|
by the user. The parameters are:
|
|
|
|
@itemize @bullet
|
|
@item @var{name}
|
|
Name of the extension instruction
|
|
|
|
@item @var{opcode}
|
|
Opcode to be used. (Bits 27:31 in the encoding). Valid values
|
|
0x10-0x1f or 0x03
|
|
|
|
@item @var{subopcode}
|
|
Subopcode to be used. Valid values are from 0x09-0x3f. However the
|
|
correct value also depends on @var{syntaxclass}
|
|
|
|
@item @var{suffixclass}
|
|
Determines the kinds of suffixes to be allowed. Valid values are
|
|
@code{SUFFIX_NONE}, @code{SUFFIX_COND},
|
|
@code{SUFFIX_FLAG} which indicates the absence or presence of
|
|
conditional suffixes and flag setting by the extension instruction.
|
|
It is also possible to specify that an instruction sets the flags and
|
|
is conditional by using @code{SUFFIX_CODE} | @code{SUFFIX_FLAG}.
|
|
|
|
@item @var{syntaxclass}
|
|
Determines the syntax class for the instruction. It can have the
|
|
following values:
|
|
|
|
@table @code
|
|
@item @code{SYNTAX_2OP}:
|
|
2 Operand Instruction
|
|
@item @code{SYNTAX_3OP}:
|
|
3 Operand Instruction
|
|
@end table
|
|
|
|
In addition there could be modifiers for the syntax class as described
|
|
below:
|
|
|
|
@itemize @minus
|
|
Syntax Class Modifiers are:
|
|
|
|
@item @code{OP1_MUST_BE_IMM}:
|
|
Modifies syntax class SYNTAX_3OP, specifying that the first operand
|
|
of a three-operand instruction must be an immediate (i.e., the result
|
|
is discarded). OP1_MUST_BE_IMM is used by bitwise ORing it with
|
|
SYNTAX_3OP as given in the example below. This could usually be used
|
|
to set the flags using specific instructions and not retain results.
|
|
|
|
@item @code{OP1_IMM_IMPLIED}:
|
|
Modifies syntax class SYNTAX_20P, it specifies that there is an
|
|
implied immediate destination operand which does not appear in the
|
|
syntax. For example, if the source code contains an instruction like:
|
|
|
|
@smallexample
|
|
inst r1,r2
|
|
@end smallexample
|
|
|
|
it really means that the first argument is an implied immediate (that
|
|
is, the result is discarded). This is the same as though the source
|
|
code were: inst 0,r1,r2. You use OP1_IMM_IMPLIED by bitwise ORing it
|
|
with SYNTAX_20P.
|
|
|
|
@end itemize
|
|
@end itemize
|
|
|
|
For example, defining 64-bit multiplier with immediate operands:
|
|
|
|
@smallexample
|
|
.extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
|
|
SYNTAX_3OP|OP1_MUST_BE_IMM
|
|
@end smallexample
|
|
|
|
The above specifies an extension instruction called mp64 which has 3 operands,
|
|
sets the flags, can be used with a condition code, for which the
|
|
first operand is an immediate. (Equivalent to discarding the result
|
|
of the operation).
|
|
|
|
@smallexample
|
|
.extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
|
|
@end smallexample
|
|
|
|
This describes a 2 operand instruction with an implicit first
|
|
immediate operand. The result of this operation would be discarded.
|
|
|
|
@cindex @code{half} directive, ARC
|
|
@item .half @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{long} directive, ARC
|
|
@item .long @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{option} directive, ARC
|
|
@item .option @var{arc|arc5|arc6|arc7|arc8}
|
|
The @code{.option} directive must be followed by the desired core
|
|
version. Again @code{arc} is an alias for
|
|
@code{arc@value{ARC_CORE_DEFAULT}}.
|
|
|
|
Note: the @code{.option} directive overrides the command line option
|
|
@code{-marc}; a warning is emitted when the version is not consistent
|
|
between the two - even for the implicit default core version
|
|
(arc@value{ARC_CORE_DEFAULT}).
|
|
|
|
@cindex @code{short} directive, ARC
|
|
@item .short @var{expressions}
|
|
*TODO*
|
|
|
|
@cindex @code{word} directive, ARC
|
|
@item .word @var{expressions}
|
|
*TODO*
|
|
|
|
@end table
|
|
|
|
|
|
@node ARC Opcodes
|
|
@section Opcodes
|
|
|
|
@cindex ARC opcodes
|
|
@cindex opcodes for ARC
|
|
|
|
For information on the ARC instruction set, see @cite{ARC Programmers
|
|
Reference Manual}, ARC International (www.arc.com)
|