150 lines
3.5 KiB
Text
150 lines
3.5 KiB
Text
@c Copyright 2001, 2002, 2003, 2005, 2006, 2007, 2008
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node PPC-Dependent
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@chapter PowerPC Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter PowerPC Dependent Features
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@end ifclear
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@cindex PowerPC support
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@menu
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* PowerPC-Opts:: Options
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* PowerPC-Pseudo:: PowerPC Assembler Directives
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@end menu
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@node PowerPC-Opts
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@section Options
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@cindex options for PowerPC
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@cindex PowerPC options
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@cindex architectures, PowerPC
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@cindex PowerPC architectures
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The PowerPC chip family includes several successive levels, using the same
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core instruction set, but including a few additional instructions at
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each level. There are exceptions to this however. For details on what
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instructions each variant supports, please see the chip's architecture
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reference manual.
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The following table lists all available PowerPC options.
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@table @code
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@item -mpwrx | -mpwr2
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Generate code for POWER/2 (RIOS2).
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@item -mpwr
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Generate code for POWER (RIOS1)
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@item -m601
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Generate code for PowerPC 601.
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@item -mppc, -mppc32, -m603, -m604
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Generate code for PowerPC 603/604.
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@item -m403, -m405
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Generate code for PowerPC 403/405.
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@item -m440
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Generate code for PowerPC 440. BookE and some 405 instructions.
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@item -m7400, -m7410, -m7450, -m7455
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Generate code for PowerPC 7400/7410/7450/7455.
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@item -m750cl
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Generate code for PowerPC 750CL.
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@item -mppc64, -m620
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Generate code for PowerPC 620/625/630.
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@item -me500, -me500x2
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Generate code for Motorola e500 core complex.
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@item -mspe
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Generate code for Motorola SPE instructions.
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@item -mppc64bridge
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Generate code for PowerPC 64, including bridge insns.
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@item -mbooke
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Generate code for 32-bit BookE.
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@item -me300
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Generate code for PowerPC e300 family.
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@item -maltivec
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Generate code for processors with AltiVec instructions.
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@item -mvsx
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Generate code for processors with Vector-Scalar (VSX) instructions.
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@item -mpower4
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Generate code for Power4 architecture.
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@item -mpower5
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Generate code for Power5 architecture.
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@item -mpower6
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Generate code for Power6 architecture.
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@item -mpower7
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Generate code for Power7 architecture.
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@item -mcell
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Generate code for Cell Broadband Engine architecture.
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@item -mcom
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Generate code Power/PowerPC common instructions.
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@item -many
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Generate code for any architecture (PWR/PWRX/PPC).
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@item -mregnames
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Allow symbolic names for registers.
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@item -mno-regnames
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Do not allow symbolic names for registers.
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@item -mrelocatable
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Support for GCC's -mrelocatable option.
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@item -mrelocatable-lib
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Support for GCC's -mrelocatable-lib option.
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@item -memb
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Set PPC_EMB bit in ELF flags.
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@item -mlittle, -mlittle-endian
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Generate code for a little endian machine.
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@item -mbig, -mbig-endian
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Generate code for a big endian machine.
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@item -msolaris
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Generate code for Solaris.
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@item -mno-solaris
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Do not generate code for Solaris.
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@end table
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@node PowerPC-Pseudo
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@section PowerPC Assembler Directives
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@cindex directives for PowerPC
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@cindex PowerPC directives
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A number of assembler directives are available for PowerPC. The
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following table is far from complete.
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@table @code
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@item .machine "string"
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This directive allows you to change the machine for which code is
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generated. @code{"string"} may be any of the -m cpu selection options
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(without the -m) enclosed in double quotes, @code{"push"}, or
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@code{"pop"}. @code{.machine "push"} saves the currently selected
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cpu, which may be restored with @code{.machine "pop"}.
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@end table
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