85d721b88f
PR9605 gdb/ * breakpoint.c (insert_bp_location): If inserting the read watchpoint failed, fallback to an access watchpoint. (bpstat_check_watchpoint): Stop for read watchpoint triggers even if the value changed, if not watching the same memory for writes. (watchpoint_locations_match): Add comment. (update_global_location_list): Copy the location's watchpoint type. * i386-nat.c (i386_length_and_rw_bits): It's an internal error to handle read watchpoints here. (i386_insert_watchpoint): Read watchpoints aren't supported. * remote.c (remote_insert_watchpoint): Return 1 for unsupported packets. * target.h (target_insert_watchpoint): Update description. 2010-02-22 Pedro Alves <pedro@codesourcery.com> PR9605 gdbserver/ * i386-low.c (i386_length_and_rw_bits): Throw a fatal error if handing a read watchpoint. (i386_low_insert_watchpoint): Read watchpoints aren't supported. 2010-02-22 Pedro Alves <pedro@codesourcery.com> PR9605 gdb/testsuite/ * gdb.base/watch-read.c, gdb.base/watch-read.exp: New files.
698 lines
23 KiB
C
698 lines
23 KiB
C
/* Native-dependent code for the i386.
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Copyright (C) 2001, 2004, 2005, 2007, 2008, 2009, 2010
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "i386-nat.h"
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#include "defs.h"
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#include "breakpoint.h"
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#include "command.h"
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#include "gdbcmd.h"
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#include "target.h"
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#include "gdb_assert.h"
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/* Support for hardware watchpoints and breakpoints using the i386
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debug registers.
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This provides several functions for inserting and removing
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hardware-assisted breakpoints and watchpoints, testing if one or
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more of the watchpoints triggered and at what address, checking
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whether a given region can be watched, etc.
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The functions below implement debug registers sharing by reference
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counts, and allow to watch regions up to 16 bytes long. */
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struct i386_dr_low_type i386_dr_low;
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/* Support for 8-byte wide hw watchpoints. */
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#define TARGET_HAS_DR_LEN_8 (i386_dr_low.debug_register_length == 8)
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/* Debug registers' indices. */
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#define DR_NADDR 4 /* The number of debug address registers. */
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#define DR_STATUS 6 /* Index of debug status register (DR6). */
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#define DR_CONTROL 7 /* Index of debug control register (DR7). */
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/* DR7 Debug Control register fields. */
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/* How many bits to skip in DR7 to get to R/W and LEN fields. */
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#define DR_CONTROL_SHIFT 16
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/* How many bits in DR7 per R/W and LEN field for each watchpoint. */
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#define DR_CONTROL_SIZE 4
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/* Watchpoint/breakpoint read/write fields in DR7. */
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#define DR_RW_EXECUTE (0x0) /* Break on instruction execution. */
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#define DR_RW_WRITE (0x1) /* Break on data writes. */
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#define DR_RW_READ (0x3) /* Break on data reads or writes. */
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/* This is here for completeness. No platform supports this
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functionality yet (as of March 2001). Note that the DE flag in the
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CR4 register needs to be set to support this. */
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#ifndef DR_RW_IORW
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#define DR_RW_IORW (0x2) /* Break on I/O reads or writes. */
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#endif
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/* Watchpoint/breakpoint length fields in DR7. The 2-bit left shift
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is so we could OR this with the read/write field defined above. */
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#define DR_LEN_1 (0x0 << 2) /* 1-byte region watch or breakpoint. */
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#define DR_LEN_2 (0x1 << 2) /* 2-byte region watch. */
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#define DR_LEN_4 (0x3 << 2) /* 4-byte region watch. */
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#define DR_LEN_8 (0x2 << 2) /* 8-byte region watch (AMD64). */
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/* Local and Global Enable flags in DR7.
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When the Local Enable flag is set, the breakpoint/watchpoint is
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enabled only for the current task; the processor automatically
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clears this flag on every task switch. When the Global Enable flag
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is set, the breakpoint/watchpoint is enabled for all tasks; the
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processor never clears this flag.
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Currently, all watchpoint are locally enabled. If you need to
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enable them globally, read the comment which pertains to this in
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i386_insert_aligned_watchpoint below. */
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#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit. */
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#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit. */
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#define DR_ENABLE_SIZE 2 /* Two enable bits per debug register. */
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/* Local and global exact breakpoint enable flags (a.k.a. slowdown
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flags). These are only required on i386, to allow detection of the
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exact instruction which caused a watchpoint to break; i486 and
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later processors do that automatically. We set these flags for
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backwards compatibility. */
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#define DR_LOCAL_SLOWDOWN (0x100)
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#define DR_GLOBAL_SLOWDOWN (0x200)
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/* Fields reserved by Intel. This includes the GD (General Detect
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Enable) flag, which causes a debug exception to be generated when a
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MOV instruction accesses one of the debug registers.
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FIXME: My Intel manual says we should use 0xF800, not 0xFC00. */
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#define DR_CONTROL_RESERVED (0xFC00)
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/* Auxiliary helper macros. */
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/* A value that masks all fields in DR7 that are reserved by Intel. */
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#define I386_DR_CONTROL_MASK (~DR_CONTROL_RESERVED)
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/* The I'th debug register is vacant if its Local and Global Enable
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bits are reset in the Debug Control register. */
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#define I386_DR_VACANT(i) \
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((dr_control_mirror & (3 << (DR_ENABLE_SIZE * (i)))) == 0)
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/* Locally enable the break/watchpoint in the I'th debug register. */
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#define I386_DR_LOCAL_ENABLE(i) \
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dr_control_mirror |= (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i)))
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/* Globally enable the break/watchpoint in the I'th debug register. */
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#define I386_DR_GLOBAL_ENABLE(i) \
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dr_control_mirror |= (1 << (DR_GLOBAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i)))
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/* Disable the break/watchpoint in the I'th debug register. */
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#define I386_DR_DISABLE(i) \
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dr_control_mirror &= ~(3 << (DR_ENABLE_SIZE * (i)))
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/* Set in DR7 the RW and LEN fields for the I'th debug register. */
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#define I386_DR_SET_RW_LEN(i,rwlen) \
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do { \
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dr_control_mirror &= ~(0x0f << (DR_CONTROL_SHIFT+DR_CONTROL_SIZE*(i))); \
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dr_control_mirror |= ((rwlen) << (DR_CONTROL_SHIFT+DR_CONTROL_SIZE*(i))); \
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} while (0)
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/* Get from DR7 the RW and LEN fields for the I'th debug register. */
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#define I386_DR_GET_RW_LEN(i) \
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((dr_control_mirror >> (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * (i))) & 0x0f)
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/* Mask that this I'th watchpoint has triggered. */
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#define I386_DR_WATCH_MASK(i) (1 << (i))
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/* Did the watchpoint whose address is in the I'th register break? */
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#define I386_DR_WATCH_HIT(i) (dr_status_mirror & I386_DR_WATCH_MASK (i))
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/* A macro to loop over all debug registers. */
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#define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++)
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/* Mirror the inferior's DRi registers. We keep the status and
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control registers separated because they don't hold addresses. */
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static CORE_ADDR dr_mirror[DR_NADDR];
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static unsigned long dr_status_mirror, dr_control_mirror;
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/* Reference counts for each debug register. */
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static int dr_ref_count[DR_NADDR];
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/* Whether or not to print the mirrored debug registers. */
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static int maint_show_dr;
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/* Types of operations supported by i386_handle_nonaligned_watchpoint. */
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typedef enum { WP_INSERT, WP_REMOVE, WP_COUNT } i386_wp_op_t;
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/* Internal functions. */
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/* Return the value of a 4-bit field for DR7 suitable for watching a
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region of LEN bytes for accesses of type TYPE. LEN is assumed to
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have the value of 1, 2, or 4. */
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static unsigned i386_length_and_rw_bits (int len, enum target_hw_bp_type type);
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/* Insert a watchpoint at address ADDR, which is assumed to be aligned
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according to the length of the region to watch. LEN_RW_BITS is the
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value of the bit-field from DR7 which describes the length and
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access type of the region to be watched by this watchpoint. Return
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0 on success, -1 on failure. */
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static int i386_insert_aligned_watchpoint (CORE_ADDR addr,
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unsigned len_rw_bits);
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/* Remove a watchpoint at address ADDR, which is assumed to be aligned
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according to the length of the region to watch. LEN_RW_BITS is the
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value of the bits from DR7 which describes the length and access
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type of the region watched by this watchpoint. Return 0 on
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success, -1 on failure. */
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static int i386_remove_aligned_watchpoint (CORE_ADDR addr,
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unsigned len_rw_bits);
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/* Insert or remove a (possibly non-aligned) watchpoint, or count the
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number of debug registers required to watch a region at address
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ADDR whose length is LEN for accesses of type TYPE. Return 0 on
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successful insertion or removal, a positive number when queried
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about the number of registers, or -1 on failure. If WHAT is not a
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valid value, bombs through internal_error. */
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static int i386_handle_nonaligned_watchpoint (i386_wp_op_t what,
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CORE_ADDR addr, int len,
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enum target_hw_bp_type type);
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/* Implementation. */
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/* Clear the reference counts and forget everything we knew about the
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debug registers. */
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void
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i386_cleanup_dregs (void)
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{
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int i;
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ALL_DEBUG_REGISTERS(i)
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{
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dr_mirror[i] = 0;
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dr_ref_count[i] = 0;
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}
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dr_control_mirror = 0;
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dr_status_mirror = 0;
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}
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/* Print the values of the mirrored debug registers. This is called
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when maint_show_dr is non-zero. To set that up, type "maint
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show-debug-regs" at GDB's prompt. */
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static void
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i386_show_dr (const char *func, CORE_ADDR addr,
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int len, enum target_hw_bp_type type)
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{
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int addr_size = gdbarch_addr_bit (target_gdbarch) / 8;
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int i;
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puts_unfiltered (func);
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if (addr || len)
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printf_unfiltered (" (addr=%lx, len=%d, type=%s)",
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/* This code is for ia32, so casting CORE_ADDR
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to unsigned long should be okay. */
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(unsigned long)addr, len,
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type == hw_write ? "data-write"
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: (type == hw_read ? "data-read"
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: (type == hw_access ? "data-read/write"
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: (type == hw_execute ? "instruction-execute"
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/* FIXME: if/when I/O read/write
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watchpoints are supported, add them
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here. */
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: "??unknown??"))));
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puts_unfiltered (":\n");
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printf_unfiltered ("\tCONTROL (DR7): %s STATUS (DR6): %s\n",
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phex (dr_control_mirror, 8), phex (dr_status_mirror, 8));
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ALL_DEBUG_REGISTERS(i)
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{
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printf_unfiltered ("\
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\tDR%d: addr=0x%s, ref.count=%d DR%d: addr=0x%s, ref.count=%d\n",
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i, phex (dr_mirror[i], addr_size), dr_ref_count[i],
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i+1, phex (dr_mirror[i+1], addr_size), dr_ref_count[i+1]);
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i++;
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}
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}
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/* Return the value of a 4-bit field for DR7 suitable for watching a
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region of LEN bytes for accesses of type TYPE. LEN is assumed to
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have the value of 1, 2, or 4. */
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static unsigned
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i386_length_and_rw_bits (int len, enum target_hw_bp_type type)
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{
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unsigned rw;
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switch (type)
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{
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case hw_execute:
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rw = DR_RW_EXECUTE;
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break;
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case hw_write:
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rw = DR_RW_WRITE;
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break;
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case hw_read:
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internal_error (__FILE__, __LINE__,
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_("The i386 doesn't support data-read watchpoints.\n"));
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case hw_access:
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rw = DR_RW_READ;
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break;
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#if 0
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/* Not yet supported. */
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case hw_io_access:
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rw = DR_RW_IORW;
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break;
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#endif
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default:
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internal_error (__FILE__, __LINE__, _("\
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Invalid hardware breakpoint type %d in i386_length_and_rw_bits.\n"),
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(int) type);
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}
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switch (len)
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{
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case 1:
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return (DR_LEN_1 | rw);
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case 2:
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return (DR_LEN_2 | rw);
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case 4:
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return (DR_LEN_4 | rw);
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case 8:
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if (TARGET_HAS_DR_LEN_8)
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return (DR_LEN_8 | rw);
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default:
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internal_error (__FILE__, __LINE__, _("\
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Invalid hardware breakpoint length %d in i386_length_and_rw_bits.\n"), len);
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}
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}
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/* Insert a watchpoint at address ADDR, which is assumed to be aligned
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according to the length of the region to watch. LEN_RW_BITS is the
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value of the bits from DR7 which describes the length and access
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type of the region to be watched by this watchpoint. Return 0 on
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success, -1 on failure. */
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static int
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i386_insert_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
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{
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int i;
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if (!i386_dr_low.set_addr || !i386_dr_low.set_control)
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return -1;
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/* First, look for an occupied debug register with the same address
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and the same RW and LEN definitions. If we find one, we can
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reuse it for this watchpoint as well (and save a register). */
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ALL_DEBUG_REGISTERS(i)
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{
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if (!I386_DR_VACANT (i)
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&& dr_mirror[i] == addr
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&& I386_DR_GET_RW_LEN (i) == len_rw_bits)
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{
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dr_ref_count[i]++;
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return 0;
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}
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}
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/* Next, look for a vacant debug register. */
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ALL_DEBUG_REGISTERS(i)
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{
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if (I386_DR_VACANT (i))
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break;
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}
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/* No more debug registers! */
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if (i >= DR_NADDR)
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return -1;
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/* Now set up the register I to watch our region. */
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/* Record the info in our local mirrored array. */
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dr_mirror[i] = addr;
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dr_ref_count[i] = 1;
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I386_DR_SET_RW_LEN (i, len_rw_bits);
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/* Note: we only enable the watchpoint locally, i.e. in the current
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task. Currently, no i386 target allows or supports global
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watchpoints; however, if any target would want that in the
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future, GDB should probably provide a command to control whether
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to enable watchpoints globally or locally, and the code below
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should use global or local enable and slow-down flags as
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appropriate. */
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I386_DR_LOCAL_ENABLE (i);
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dr_control_mirror |= DR_LOCAL_SLOWDOWN;
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dr_control_mirror &= I386_DR_CONTROL_MASK;
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/* Finally, actually pass the info to the inferior. */
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i386_dr_low.set_addr (i, addr);
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i386_dr_low.set_control (dr_control_mirror);
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/* Only a sanity check for leftover bits (set possibly only by inferior). */
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if (i386_dr_low.unset_status)
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i386_dr_low.unset_status (I386_DR_WATCH_MASK (i));
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return 0;
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}
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/* Remove a watchpoint at address ADDR, which is assumed to be aligned
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according to the length of the region to watch. LEN_RW_BITS is the
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value of the bits from DR7 which describes the length and access
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type of the region watched by this watchpoint. Return 0 on
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success, -1 on failure. */
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static int
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i386_remove_aligned_watchpoint (CORE_ADDR addr, unsigned len_rw_bits)
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{
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int i, retval = -1;
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ALL_DEBUG_REGISTERS(i)
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{
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if (!I386_DR_VACANT (i)
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&& dr_mirror[i] == addr
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&& I386_DR_GET_RW_LEN (i) == len_rw_bits)
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{
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if (--dr_ref_count[i] == 0) /* no longer in use? */
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{
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/* Reset our mirror. */
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dr_mirror[i] = 0;
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I386_DR_DISABLE (i);
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/* Reset it in the inferior. */
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i386_dr_low.set_control (dr_control_mirror);
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if (i386_dr_low.reset_addr)
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i386_dr_low.reset_addr (i);
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}
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retval = 0;
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}
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}
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return retval;
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}
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/* Insert or remove a (possibly non-aligned) watchpoint, or count the
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number of debug registers required to watch a region at address
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ADDR whose length is LEN for accesses of type TYPE. Return 0 on
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successful insertion or removal, a positive number when queried
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about the number of registers, or -1 on failure. If WHAT is not a
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valid value, bombs through internal_error. */
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static int
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i386_handle_nonaligned_watchpoint (i386_wp_op_t what, CORE_ADDR addr, int len,
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enum target_hw_bp_type type)
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{
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int retval = 0, status = 0;
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int max_wp_len = TARGET_HAS_DR_LEN_8 ? 8 : 4;
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static int size_try_array[8][8] =
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{
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{1, 1, 1, 1, 1, 1, 1, 1}, /* Trying size one. */
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{2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size two. */
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{2, 1, 2, 1, 2, 1, 2, 1}, /* Trying size three. */
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{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size four. */
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{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size five. */
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{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size six. */
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{4, 1, 2, 1, 4, 1, 2, 1}, /* Trying size seven. */
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{8, 1, 2, 1, 4, 1, 2, 1}, /* Trying size eight. */
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};
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while (len > 0)
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{
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int align = addr % max_wp_len;
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/* Four (eight on AMD64) is the maximum length a debug register
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can watch. */
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int try = (len > max_wp_len ? (max_wp_len - 1) : len - 1);
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int size = size_try_array[try][align];
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if (what == WP_COUNT)
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{
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/* size_try_array[] is defined such that each iteration
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through the loop is guaranteed to produce an address and a
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size that can be watched with a single debug register.
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Thus, for counting the registers required to watch a
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region, we simply need to increment the count on each
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iteration. */
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retval++;
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|
}
|
|
else
|
|
{
|
|
unsigned len_rw = i386_length_and_rw_bits (size, type);
|
|
|
|
if (what == WP_INSERT)
|
|
status = i386_insert_aligned_watchpoint (addr, len_rw);
|
|
else if (what == WP_REMOVE)
|
|
status = i386_remove_aligned_watchpoint (addr, len_rw);
|
|
else
|
|
internal_error (__FILE__, __LINE__, _("\
|
|
Invalid value %d of operation in i386_handle_nonaligned_watchpoint.\n"),
|
|
(int)what);
|
|
/* We keep the loop going even after a failure, because some
|
|
of the other aligned watchpoints might still succeed
|
|
(e.g. if they watch addresses that are already watched,
|
|
in which case we just increment the reference counts of
|
|
occupied debug registers). If we break out of the loop
|
|
too early, we could cause those addresses watched by
|
|
other watchpoints to be disabled when breakpoint.c reacts
|
|
to our failure to insert this watchpoint and tries to
|
|
remove it. */
|
|
if (status)
|
|
retval = status;
|
|
}
|
|
|
|
addr += size;
|
|
len -= size;
|
|
}
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* Insert a watchpoint to watch a memory region which starts at
|
|
address ADDR and whose length is LEN bytes. Watch memory accesses
|
|
of the type TYPE. Return 0 on success, -1 on failure. */
|
|
|
|
static int
|
|
i386_insert_watchpoint (CORE_ADDR addr, int len, int type)
|
|
{
|
|
int retval;
|
|
|
|
if (type == hw_read)
|
|
return 1; /* unsupported */
|
|
|
|
if (((len != 1 && len !=2 && len !=4) && !(TARGET_HAS_DR_LEN_8 && len == 8))
|
|
|| addr % len != 0)
|
|
retval = i386_handle_nonaligned_watchpoint (WP_INSERT, addr, len, type);
|
|
else
|
|
{
|
|
unsigned len_rw = i386_length_and_rw_bits (len, type);
|
|
|
|
retval = i386_insert_aligned_watchpoint (addr, len_rw);
|
|
}
|
|
|
|
if (maint_show_dr)
|
|
i386_show_dr ("insert_watchpoint", addr, len, type);
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* Remove a watchpoint that watched the memory region which starts at
|
|
address ADDR, whose length is LEN bytes, and for accesses of the
|
|
type TYPE. Return 0 on success, -1 on failure. */
|
|
static int
|
|
i386_remove_watchpoint (CORE_ADDR addr, int len, int type)
|
|
{
|
|
int retval;
|
|
|
|
if (((len != 1 && len !=2 && len !=4) && !(TARGET_HAS_DR_LEN_8 && len == 8))
|
|
|| addr % len != 0)
|
|
retval = i386_handle_nonaligned_watchpoint (WP_REMOVE, addr, len, type);
|
|
else
|
|
{
|
|
unsigned len_rw = i386_length_and_rw_bits (len, type);
|
|
|
|
retval = i386_remove_aligned_watchpoint (addr, len_rw);
|
|
}
|
|
|
|
if (maint_show_dr)
|
|
i386_show_dr ("remove_watchpoint", addr, len, type);
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* Return non-zero if we can watch a memory region that starts at
|
|
address ADDR and whose length is LEN bytes. */
|
|
|
|
static int
|
|
i386_region_ok_for_watchpoint (CORE_ADDR addr, int len)
|
|
{
|
|
int nregs;
|
|
|
|
/* Compute how many aligned watchpoints we would need to cover this
|
|
region. */
|
|
nregs = i386_handle_nonaligned_watchpoint (WP_COUNT, addr, len, hw_write);
|
|
return nregs <= DR_NADDR ? 1 : 0;
|
|
}
|
|
|
|
/* If the inferior has some watchpoint that triggered, set the
|
|
address associated with that watchpoint and return non-zero.
|
|
Otherwise, return zero. */
|
|
|
|
static int
|
|
i386_stopped_data_address (struct target_ops *ops, CORE_ADDR *addr_p)
|
|
{
|
|
CORE_ADDR addr = 0;
|
|
int i;
|
|
int rc = 0;
|
|
|
|
dr_status_mirror = i386_dr_low.get_status ();
|
|
|
|
ALL_DEBUG_REGISTERS(i)
|
|
{
|
|
if (I386_DR_WATCH_HIT (i)
|
|
/* This second condition makes sure DRi is set up for a data
|
|
watchpoint, not a hardware breakpoint. The reason is
|
|
that GDB doesn't call the target_stopped_data_address
|
|
method except for data watchpoints. In other words, I'm
|
|
being paranoiac. */
|
|
&& I386_DR_GET_RW_LEN (i) != 0
|
|
/* This third condition makes sure DRi is not vacant, this
|
|
avoids false positives in windows-nat.c. */
|
|
&& !I386_DR_VACANT (i))
|
|
{
|
|
addr = dr_mirror[i];
|
|
rc = 1;
|
|
if (maint_show_dr)
|
|
i386_show_dr ("watchpoint_hit", addr, -1, hw_write);
|
|
}
|
|
}
|
|
if (maint_show_dr && addr == 0)
|
|
i386_show_dr ("stopped_data_addr", 0, 0, hw_write);
|
|
|
|
if (rc)
|
|
*addr_p = addr;
|
|
return rc;
|
|
}
|
|
|
|
static int
|
|
i386_stopped_by_watchpoint (void)
|
|
{
|
|
CORE_ADDR addr = 0;
|
|
return i386_stopped_data_address (¤t_target, &addr);
|
|
}
|
|
|
|
/* Insert a hardware-assisted breakpoint at BP_TGT->placed_address.
|
|
Return 0 on success, EBUSY on failure. */
|
|
static int
|
|
i386_insert_hw_breakpoint (struct gdbarch *gdbarch,
|
|
struct bp_target_info *bp_tgt)
|
|
{
|
|
unsigned len_rw = i386_length_and_rw_bits (1, hw_execute);
|
|
CORE_ADDR addr = bp_tgt->placed_address;
|
|
int retval = i386_insert_aligned_watchpoint (addr, len_rw) ? EBUSY : 0;
|
|
|
|
if (maint_show_dr)
|
|
i386_show_dr ("insert_hwbp", addr, 1, hw_execute);
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
|
|
Return 0 on success, -1 on failure. */
|
|
|
|
static int
|
|
i386_remove_hw_breakpoint (struct gdbarch *gdbarch,
|
|
struct bp_target_info *bp_tgt)
|
|
{
|
|
unsigned len_rw = i386_length_and_rw_bits (1, hw_execute);
|
|
CORE_ADDR addr = bp_tgt->placed_address;
|
|
int retval = i386_remove_aligned_watchpoint (addr, len_rw);
|
|
|
|
if (maint_show_dr)
|
|
i386_show_dr ("remove_hwbp", addr, 1, hw_execute);
|
|
|
|
return retval;
|
|
}
|
|
|
|
/* Returns the number of hardware watchpoints of type TYPE that we can
|
|
set. Value is positive if we can set CNT watchpoints, zero if
|
|
setting watchpoints of type TYPE is not supported, and negative if
|
|
CNT is more than the maximum number of watchpoints of type TYPE
|
|
that we can support. TYPE is one of bp_hardware_watchpoint,
|
|
bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
|
|
CNT is the number of such watchpoints used so far (including this
|
|
one). OTHERTYPE is non-zero if other types of watchpoints are
|
|
currently enabled.
|
|
|
|
We always return 1 here because we don't have enough information
|
|
about possible overlap of addresses that they want to watch. As an
|
|
extreme example, consider the case where all the watchpoints watch
|
|
the same address and the same region length: then we can handle a
|
|
virtually unlimited number of watchpoints, due to debug register
|
|
sharing implemented via reference counts in i386-nat.c. */
|
|
|
|
static int
|
|
i386_can_use_hw_breakpoint (int type, int cnt, int othertype)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
static void
|
|
add_show_debug_regs_command (void)
|
|
{
|
|
/* A maintenance command to enable printing the internal DRi mirror
|
|
variables. */
|
|
add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
|
|
&maint_show_dr, _("\
|
|
Set whether to show variables that mirror the x86 debug registers."), _("\
|
|
Show whether to show variables that mirror the x86 debug registers."), _("\
|
|
Use \"on\" to enable, \"off\" to disable.\n\
|
|
If enabled, the debug registers values are shown when GDB inserts\n\
|
|
or removes a hardware breakpoint or watchpoint, and when the inferior\n\
|
|
triggers a breakpoint or watchpoint."),
|
|
NULL,
|
|
NULL,
|
|
&maintenance_set_cmdlist,
|
|
&maintenance_show_cmdlist);
|
|
}
|
|
|
|
/* There are only two global functions left. */
|
|
|
|
void
|
|
i386_use_watchpoints (struct target_ops *t)
|
|
{
|
|
/* After a watchpoint trap, the PC points to the instruction after the
|
|
one that caused the trap. Therefore we don't need to step over it.
|
|
But we do need to reset the status register to avoid another trap. */
|
|
t->to_have_continuable_watchpoint = 1;
|
|
|
|
t->to_can_use_hw_breakpoint = i386_can_use_hw_breakpoint;
|
|
t->to_region_ok_for_hw_watchpoint = i386_region_ok_for_watchpoint;
|
|
t->to_stopped_by_watchpoint = i386_stopped_by_watchpoint;
|
|
t->to_stopped_data_address = i386_stopped_data_address;
|
|
t->to_insert_watchpoint = i386_insert_watchpoint;
|
|
t->to_remove_watchpoint = i386_remove_watchpoint;
|
|
t->to_insert_hw_breakpoint = i386_insert_hw_breakpoint;
|
|
t->to_remove_hw_breakpoint = i386_remove_hw_breakpoint;
|
|
}
|
|
|
|
void
|
|
i386_set_debug_register_length (int len)
|
|
{
|
|
/* This function should be called only once for each native target. */
|
|
gdb_assert (i386_dr_low.debug_register_length == 0);
|
|
gdb_assert (len == 4 || len == 8);
|
|
i386_dr_low.debug_register_length = len;
|
|
add_show_debug_regs_command ();
|
|
}
|