old-cross-binutils/ld/testsuite/ld-arm/attr-merge-vfp-5-sp.s at a715796ba188e7ca9eac6e613439b63fe50a677d - darkkirb/old-cross-binutils - Lotte's Git

darkkirb/old-cross-binutils

Terry Guo a715796ba1 Support ARM Cortex-M7

include/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
	(FPU_VFP_V5D16): Likewise.
	(FPU_VFP_V5_SP_D16): Likewise.
	(FPU_ARCH_VFP_V5D16): Likewise.
	(FPU_ARCH_VFP_V5_SP_D16): Likewise.

bfd/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5.

binutils/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.

gas/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
	(arm_cpus): Support cortex-m7.
	(arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
	(do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
	register only target like FPv5-SP-D16.
	(do_neon_cvttb_1): Likewise.
	(do_vfp_nsyn_fpv8): Likewise.
	(do_vrint_1): Likewise.
	(aeabi_set_public_attributes): Set proper FP arch for FPv5.
	* doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.

gas/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* gas/arm/armv7e-m+fpv5-d16.s: New.
	* gas/arm/armv7e-m+fpv5-d16.d: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.

ld/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* ld-arm/attr-merge-vfp-4-sp.s: New test source file.
	* ld-arm/attr-merge-vfp-5-sp.s: Likewise.
	* ld-arm/attr-merge-vfp-5.s: Likewise.
	* ld-arm/attr-merge-vfp-8.d: New test.
	* ld-arm/attr-merge-vfp-8r.d: Likewise.
	* ld-arm/attr-merge-vfp-9.d: Likewise.
	* ld-arm/attr-merge-vfp-9r.d: Likewise.
	* ld-arm/attr-merge-vfp-10.d: Likewise.
	* ld-arm/attr-merge-vfp-10r.d: Likewise.
	* ld-arm/attr-merge-vfp-11.d: Likewise.
	* ld-arm/attr-merge-vfp-11r.d: Likewise.
	* ld-arm/attr-merge-vfp-12.d: Likewise.
	* ld-arm/attr-merge-vfp-12r.d: Likewise.
	* ld-arm/attr-merge-vfp-13.d: Likewise.
	* ld-arm/attr-merge-vfp-13r.d: Likewise.
	* ld-arm/attr-merge-vfp-14.d: Likewise.
	* ld-arm/attr-merge-vfp-14r.d: Likewise.
	* ld-arm/arm-elf.exp: Run the new tests.

2014-11-21 11:36:06 +08:00

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ArmAsm

Raw Blame History

	`.fpu fpv5-sp-d16`