326 lines
7.1 KiB
C
326 lines
7.1 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _CPU_C_
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#define _CPU_C_
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#ifndef STATIC_INLINE_CPU
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#define STATIC_INLINE_CPU STATIC_INLINE
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#endif
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#include <setjmp.h>
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#include "cpu.h"
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#include "idecode.h"
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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struct _cpu {
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/* the registers */
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registers regs;
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/* current instruction address */
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unsigned_word program_counter;
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/* the memory maps */
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core *physical; /* all of memory */
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vm *virtual;
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vm_instruction_map *instruction_map; /* instructions */
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vm_data_map *data_map; /* data */
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/* current state of interrupt inputs */
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int external_exception_pending;
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/* the system this processor is contained within */
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cpu_mon *monitor;
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psim *system;
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event_queue *events;
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int cpu_nr;
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#if WITH_IDECODE_CACHE_SIZE
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/* a cache to store cracked instructions */
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idecode_cache icache[WITH_IDECODE_CACHE_SIZE];
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#endif
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/* address reservation: keep the physical address and the contents
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of memory at that address */
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memory_reservation reservation;
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/* offset from event time to this cpu's idea of the local time */
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signed64 time_base_local_time;
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signed64 decrementer_local_time;
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event_entry_tag decrementer_event;
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};
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INLINE_CPU cpu *
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cpu_create(psim *system,
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core *memory,
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event_queue *events,
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cpu_mon *monitor,
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int cpu_nr)
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{
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cpu *processor = ZALLOC(cpu);
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/* create the virtual memory map from the core */
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processor->physical = memory;
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processor->virtual = vm_create(memory);
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processor->instruction_map = vm_create_instruction_map(processor->virtual);
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processor->data_map = vm_create_data_map(processor->virtual);
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/* link back to core system */
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processor->system = system;
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processor->events = events;
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processor->cpu_nr = cpu_nr;
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processor->monitor = monitor;
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return processor;
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}
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INLINE_CPU void
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cpu_init(cpu *processor)
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{
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bzero(&processor->regs, sizeof(processor->regs));
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/* FIXME - should any of VM be inited also ? */
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}
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/* find ones way home */
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INLINE_CPU psim *
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cpu_system(cpu *processor)
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{
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return processor->system;
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}
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INLINE_CPU int
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cpu_nr(cpu *processor)
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{
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return processor->cpu_nr;
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}
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INLINE_CPU event_queue *
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cpu_event_queue(cpu *processor)
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{
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return processor->events;
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}
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INLINE_CPU cpu_mon *
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cpu_monitor(cpu *processor)
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{
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return processor->monitor;
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}
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/* The processors local concept of time */
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INLINE_CPU signed64
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cpu_get_time_base(cpu *processor)
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{
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return (event_queue_time(processor->events)
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+ processor->time_base_local_time);
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}
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INLINE_CPU void
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cpu_set_time_base(cpu *processor,
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signed64 time_base)
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{
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processor->time_base_local_time = (event_queue_time(processor->events)
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- time_base);
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}
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INLINE_CPU signed32
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cpu_get_decrementer(cpu *processor)
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{
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return (processor->decrementer_local_time
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- event_queue_time(processor->events));
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}
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STATIC_INLINE_CPU void
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cpu_decrement_event(event_queue *queue,
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void *data)
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{
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cpu *processor = (cpu*)data;
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if (!decrementer_interrupt(processor)) {
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processor->decrementer_event = event_queue_schedule(processor->events,
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1, /* NOW! */
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cpu_decrement_event,
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processor);
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}
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}
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INLINE_CPU void
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cpu_set_decrementer(cpu *processor,
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signed32 decrementer)
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{
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signed64 old_decrementer = (processor->decrementer_local_time
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- event_queue_time(processor->events));
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event_queue_deschedule(processor->events, processor->decrementer_event);
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processor->decrementer_local_time = (event_queue_time(processor->events)
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+ decrementer);
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if (decrementer < 0 && old_decrementer >= 0)
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/* dec interrupt occures if the sign of the decrement reg is
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changed by the load operation */
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processor->decrementer_event = event_queue_schedule(processor->events,
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1, /* NOW! */
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cpu_decrement_event,
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processor);
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else if (decrementer >= 0)
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processor->decrementer_event = event_queue_schedule(processor->events,
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decrementer,
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cpu_decrement_event,
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processor);
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}
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/* program counter manipulation */
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INLINE_CPU void
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cpu_set_program_counter(cpu *processor,
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unsigned_word new_program_counter)
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{
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processor->program_counter = new_program_counter;
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}
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INLINE_CPU unsigned_word
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cpu_get_program_counter(cpu *processor)
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{
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return processor->program_counter;
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}
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INLINE_CPU void
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cpu_restart(cpu *processor,
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unsigned_word nia)
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{
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processor->program_counter = nia;
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psim_restart(processor->system, processor->cpu_nr);
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}
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INLINE_CPU void
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cpu_halt(cpu *processor,
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unsigned_word cia,
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stop_reason reason,
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int signal)
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{
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if (processor == NULL) {
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error("cpu_halt() processor=NULL, cia=0x%x, reason=%d, signal=%d\n",
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cia,
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reason,
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signal);
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}
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else {
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processor->program_counter = cia;
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psim_halt(processor->system, processor->cpu_nr, cia, reason, signal);
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}
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}
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#if WITH_IDECODE_CACHE_SIZE
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/* allow access to the cpu's instruction cache */
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INLINE_CPU idecode_cache *
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cpu_icache_entry(cpu *processor,
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unsigned_word cia)
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{
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return &processor->icache[cia / 4 % WITH_IDECODE_CACHE_SIZE];
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}
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INLINE_CPU void
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cpu_flush_icache(cpu *processor)
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{
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int i;
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/* force all addresses to 0xff... so that they never hit */
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for (i = 0; i < WITH_IDECODE_CACHE_SIZE; i++)
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processor->icache[i].address = MASK(0, 63);
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}
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#endif
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/* address map revelation */
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INLINE_CPU vm_instruction_map *
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cpu_instruction_map(cpu *processor)
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{
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return processor->instruction_map;
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}
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INLINE_CPU vm_data_map *
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cpu_data_map(cpu *processor)
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{
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return processor->data_map;
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}
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/* reservation access */
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INLINE_CPU memory_reservation *
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cpu_reservation(cpu *processor)
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{
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return &processor->reservation;
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}
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/* register access */
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INLINE_CPU registers *
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cpu_registers(cpu *processor)
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{
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return &processor->regs;
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}
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INLINE_CPU void
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cpu_synchronize_context(cpu *processor)
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{
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#if (WITH_IDECODE_CACHE)
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/* kill of the cache */
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cpu_flush_icache(processor);
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#endif
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/* don't allow the processor to change endian modes */
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if ((cpu_registers(processor)->msr & msr_little_endian_mode)
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&& CURRENT_TARGET_BYTE_ORDER != LITTLE_ENDIAN) {
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error("vm_synchronize_context() - unsuported change of byte order\n");
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}
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/* update virtual memory */
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vm_synchronize_context(processor->virtual,
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processor->regs.spr,
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processor->regs.sr,
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processor->regs.msr);
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}
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/* might again be useful one day */
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INLINE_CPU void
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cpu_print_info(cpu *processor, int verbose)
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{
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}
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#endif /* _CPU_C_ */
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