454de2ee15
* armcopro.c: Remove extraneous whitespace. * armdefs.h: Likewise. * armfpe.h: Likewise. * arminit.c: Likewise. * armopts.h: Likewise. * armos.c: Likewise. * armos.h: Likewise. * armrdi.c: Likewise. * armsupp.c: Likewise. * armvirt.c: Likewise. * bag.c: Likewise. * bag.h: Likewise. * communicate.c: Likewise. * communicate.h: Likewise. * dbg_conf.h: Likewise. * dbg_cp.h: Likewise. * dbg_hif.h: Likewise. * dbg_rdi.h: Likewise. * gdbhost.c: Likewise. * gdbhost.h: Likewise. * iwmmxt.c: Likewise. * iwmmxt.h: Likewise. * kid.c: Likewise. * main.c: Likewise. * maverick.c: Likewise. * parent.c: Likewise. * thumbemu.c: Likewise. * wrapper.c: Likewise.
521 lines
15 KiB
C
521 lines
15 KiB
C
/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>. */
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/* This file contains a complete ARMulator memory model, modelling a
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"virtual memory" system. A much simpler model can be found in armfast.c,
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and that model goes faster too, but has a fixed amount of memory. This
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model's memory has 64K pages, allocated on demand from a 64K entry page
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table. The routines PutWord and GetWord implement this. Pages are never
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freed as they might be needed again. A single area of memory may be
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defined to generate aborts. */
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#include "armopts.h"
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#include "armos.h"
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#include "armdefs.h"
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#include "ansidecl.h"
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#ifdef VALIDATE /* for running the validate suite */
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#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
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#define ABORTS 1
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#endif
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/* #define ABORTS */
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#ifdef ABORTS /* the memory system will abort */
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/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
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For the new test suite Abort between 8 Mbytes and 26 Mbytes */
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/* #define LOWABORT 32 * 1024
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#define HIGHABORT 32 * 1024 * 1024 */
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#define LOWABORT 8 * 1024 * 1024
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#define HIGHABORT 26 * 1024 * 1024
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#endif
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#define NUMPAGES 64 * 1024
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#define PAGESIZE 64 * 1024
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#define PAGEBITS 16
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#define OFFSETBITS 0xffff
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int SWI_vector_installed = FALSE;
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/***************************************************************************\
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* Get a Word from Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static ARMword
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GetWord (ARMul_State * state, ARMword address, int check)
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{
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ARMword page;
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ARMword offset;
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ARMword **pagetable;
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ARMword *pageptr;
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if (check && state->is_XScale)
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XScale_check_memacc (state, &address, 0);
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page = address >> PAGEBITS;
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offset = (address & OFFSETBITS) >> 2;
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pagetable = (ARMword **) state->MemDataPtr;
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pageptr = *(pagetable + page);
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if (pageptr == NULL)
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{
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pageptr = (ARMword *) malloc (PAGESIZE);
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if (pageptr == NULL)
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{
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perror ("ARMulator can't allocate VM page");
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exit (12);
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}
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*(pagetable + page) = pageptr;
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}
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return *(pageptr + offset);
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}
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/***************************************************************************\
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* Put a Word into Virtual Memory, maybe allocating the page *
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\***************************************************************************/
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static void
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PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
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{
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ARMword page;
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ARMword offset;
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ARMword **pagetable;
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ARMword *pageptr;
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if (check && state->is_XScale)
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XScale_check_memacc (state, &address, 1);
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page = address >> PAGEBITS;
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offset = (address & OFFSETBITS) >> 2;
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pagetable = (ARMword **) state->MemDataPtr;
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pageptr = *(pagetable + page);
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if (pageptr == NULL)
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{
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pageptr = (ARMword *) malloc (PAGESIZE);
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if (pageptr == NULL)
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{
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perror ("ARMulator can't allocate VM page");
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exit (13);
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}
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*(pagetable + page) = pageptr;
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}
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if (address == 0x8)
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SWI_vector_installed = TRUE;
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*(pageptr + offset) = data;
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}
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/***************************************************************************\
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* Initialise the memory interface *
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\***************************************************************************/
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unsigned
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ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
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{
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ARMword **pagetable;
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unsigned page;
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if (initmemsize)
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state->MemSize = initmemsize;
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pagetable = (ARMword **) malloc (sizeof (ARMword *) * NUMPAGES);
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if (pagetable == NULL)
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return FALSE;
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for (page = 0; page < NUMPAGES; page++)
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*(pagetable + page) = NULL;
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state->MemDataPtr = (unsigned char *) pagetable;
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ARMul_ConsolePrint (state, ", 4 Gb memory");
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return TRUE;
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}
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/***************************************************************************\
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* Remove the memory interface *
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\***************************************************************************/
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void
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ARMul_MemoryExit (ARMul_State * state)
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{
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ARMword page;
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ARMword **pagetable;
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ARMword *pageptr;
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pagetable = (ARMword **) state->MemDataPtr;
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for (page = 0; page < NUMPAGES; page++)
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{
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pageptr = *(pagetable + page);
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if (pageptr != NULL)
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free ((char *) pageptr);
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}
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free ((char *) pagetable);
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return;
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}
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/***************************************************************************\
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* ReLoad Instruction *
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\***************************************************************************/
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ARMword
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ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
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{
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT)
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{
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ARMul_PREFETCHABORT (address);
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return ARMul_ABORTWORD;
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}
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else
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{
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ARMul_CLEARABORT;
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}
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#endif
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if ((isize == 2) && (address & 0x2))
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{
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/* We return the next two halfwords: */
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ARMword lo = GetWord (state, address, FALSE);
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ARMword hi = GetWord (state, address + 4, FALSE);
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if (state->bigendSig == HIGH)
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return (lo << 16) | (hi >> 16);
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else
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return ((hi & 0xFFFF) << 16) | (lo >> 16);
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}
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return GetWord (state, address, TRUE);
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}
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/***************************************************************************\
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* Load Instruction, Sequential Cycle *
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\***************************************************************************/
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ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
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{
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state->NumScycles++;
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#ifdef HOURGLASS
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if ((state->NumScycles & HOURGLASS_RATE) == 0)
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{
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HOURGLASS;
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}
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#endif
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return ARMul_ReLoadInstr (state, address, isize);
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}
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/***************************************************************************\
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* Load Instruction, Non Sequential Cycle *
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\***************************************************************************/
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ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
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{
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state->NumNcycles++;
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return ARMul_ReLoadInstr (state, address, isize);
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}
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/***************************************************************************\
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* Read Word (but don't tell anyone!) *
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\***************************************************************************/
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ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
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{
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT)
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{
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ARMul_DATAABORT (address);
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return ARMul_ABORTWORD;
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}
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else
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{
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ARMul_CLEARABORT;
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}
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#endif
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return GetWord (state, address, TRUE);
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}
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/***************************************************************************\
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* Load Word, Sequential Cycle *
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\***************************************************************************/
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ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
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{
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state->NumScycles++;
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return ARMul_ReadWord (state, address);
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}
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/***************************************************************************\
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* Load Word, Non Sequential Cycle *
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\***************************************************************************/
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ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
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{
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state->NumNcycles++;
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return ARMul_ReadWord (state, address);
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}
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/***************************************************************************\
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* Load Halfword, (Non Sequential Cycle) *
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\***************************************************************************/
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ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
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{
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ARMword temp, offset;
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state->NumNcycles++;
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temp = ARMul_ReadWord (state, address);
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offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
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return (temp >> offset) & 0xffff;
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}
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/***************************************************************************\
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* Read Byte (but don't tell anyone!) *
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\***************************************************************************/
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ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
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{
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ARMword temp, offset;
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temp = ARMul_ReadWord (state, address);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
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return (temp >> offset & 0xffL);
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}
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/***************************************************************************\
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* Load Byte, (Non Sequential Cycle) *
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\***************************************************************************/
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ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
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{
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state->NumNcycles++;
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return ARMul_ReadByte (state, address);
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}
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/***************************************************************************\
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* Write Word (but don't tell anyone!) *
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\***************************************************************************/
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void
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ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
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{
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#ifdef ABORTS
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if (address >= LOWABORT && address < HIGHABORT)
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{
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ARMul_DATAABORT (address);
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return;
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}
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else
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{
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ARMul_CLEARABORT;
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}
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#endif
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PutWord (state, address, data, TRUE);
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}
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/***************************************************************************\
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* Store Word, Sequential Cycle *
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\***************************************************************************/
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void
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ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
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{
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state->NumScycles++;
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ARMul_WriteWord (state, address, data);
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}
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/***************************************************************************\
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* Store Word, Non Sequential Cycle *
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\***************************************************************************/
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void
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ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
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{
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state->NumNcycles++;
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ARMul_WriteWord (state, address, data);
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}
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/***************************************************************************\
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* Store HalfWord, (Non Sequential Cycle) *
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\***************************************************************************/
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void
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ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp, offset;
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state->NumNcycles++;
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#ifdef VALIDATE
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if (address == TUBE)
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{
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if (data == 4)
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state->Emulate = FALSE;
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else
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(void) putc ((char) data, stderr); /* Write Char */
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return;
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}
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#endif
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temp = ARMul_ReadWord (state, address);
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offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
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PutWord (state, address,
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(temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset),
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TRUE);
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}
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/***************************************************************************\
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* Write Byte (but don't tell anyone!) *
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\***************************************************************************/
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void
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ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp, offset;
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temp = ARMul_ReadWord (state, address);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
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PutWord (state, address,
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(temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
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TRUE);
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}
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/***************************************************************************\
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* Store Byte, (Non Sequential Cycle) *
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\***************************************************************************/
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void
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ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
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{
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state->NumNcycles++;
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#ifdef VALIDATE
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if (address == TUBE)
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{
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if (data == 4)
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state->Emulate = FALSE;
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else
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(void) putc ((char) data, stderr); /* Write Char */
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return;
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}
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#endif
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ARMul_WriteByte (state, address, data);
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}
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/***************************************************************************\
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* Swap Word, (Two Non Sequential Cycles) *
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\***************************************************************************/
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ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp;
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state->NumNcycles++;
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temp = ARMul_ReadWord (state, address);
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state->NumNcycles++;
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PutWord (state, address, data, TRUE);
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return temp;
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}
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/***************************************************************************\
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* Swap Byte, (Two Non Sequential Cycles) *
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\***************************************************************************/
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ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp;
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temp = ARMul_LoadByte (state, address);
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ARMul_StoreByte (state, address, data);
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return temp;
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}
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/***************************************************************************\
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* Count I Cycles *
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\***************************************************************************/
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void
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ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
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{
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state->NumIcycles += number;
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ARMul_CLEARABORT;
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}
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/***************************************************************************\
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* Count C Cycles *
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\***************************************************************************/
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void
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ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
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{
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state->NumCcycles += number;
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ARMul_CLEARABORT;
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}
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/* Read a byte. Do not check for alignment or access errors. */
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ARMword
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ARMul_SafeReadByte (ARMul_State * state, ARMword address)
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{
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ARMword temp, offset;
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temp = GetWord (state, address, FALSE);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
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return (temp >> offset & 0xffL);
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}
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void
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ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp, offset;
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temp = GetWord (state, address, FALSE);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
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PutWord (state, address,
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(temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
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FALSE);
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}
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