226 lines
8.5 KiB
C
226 lines
8.5 KiB
C
/* Definitions to make GDB run on a mips box under 4.3bsd.
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Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
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1997, 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
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Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
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and by Alessandro Forin (af@cs.cmu.edu) at CMU..
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef TM_MIPS_H
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#define TM_MIPS_H 1
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#define GDB_MULTI_ARCH 1
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#include "regcache.h"
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struct frame_info;
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struct symbol;
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struct type;
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struct value;
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#include <bfd.h>
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#include "coff/sym.h" /* Needed for PDR below. */
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#include "coff/symconst.h"
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/* Return non-zero if PC points to an instruction which will cause a step
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to execute both the instruction at PC and an instruction at PC+4. */
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extern int mips_step_skips_delay (CORE_ADDR);
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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real way to know how big a register is. */
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#define REGISTER_SIZE 4
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/* The size of a register. This is predefined in tm-mips64.h. We
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can't use REGISTER_SIZE because that is used for various other
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things. */
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#ifndef MIPS_REGSIZE
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#define MIPS_REGSIZE 4
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#endif
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/* Initializer for an array of names of registers.
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There should be NUM_REGS strings in this initializer. */
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#ifndef MIPS_REGISTER_NAMES
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#define MIPS_REGISTER_NAMES \
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{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
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"sr", "lo", "hi", "bad", "cause","pc", \
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"fsr", "fir", ""/*"fp"*/, "", \
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"", "", "", "", "", "", "", "", \
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"", "", "", "", "", "", "", "", \
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}
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#endif
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define ZERO_REGNUM 0 /* read-only register, always 0 */
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#define V0_REGNUM 2 /* Function integer return value */
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#define A0_REGNUM 4 /* Loc of first arg during a subr call */
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#define T9_REGNUM 25 /* Contains address of callee in PIC */
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#define SP_REGNUM 29 /* Contains address of top of stack */
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#define RA_REGNUM 31 /* Contains return address value */
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#define PS_REGNUM 32 /* Contains processor status */
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#define HI_REGNUM 34 /* Multiple/divide temp */
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#define LO_REGNUM 33 /* ... */
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#define BADVADDR_REGNUM 35 /* bad vaddr for addressing exception */
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#define CAUSE_REGNUM 36 /* describes last exception */
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#define PC_REGNUM 37 /* Contains program counter */
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#define FP0_REGNUM 38 /* Floating point register 0 (single float) */
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#define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */
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#define FCRCS_REGNUM 70 /* FP control/status */
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#define FCRIR_REGNUM 71 /* FP implementation/revision */
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#define UNUSED_REGNUM 73 /* Never used, FIXME */
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#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
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#define PRID_REGNUM 89 /* Processor ID */
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#define LAST_EMBED_REGNUM 89 /* Last one */
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'. */
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#define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
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/* Return the GDB type object for the "standard" data type of data in
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register N. */
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#ifndef REGISTER_VIRTUAL_TYPE
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#define REGISTER_VIRTUAL_TYPE(N) \
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(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
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: ((N) == 32 /*SR*/) ? builtin_type_uint32 \
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: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
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: builtin_type_int)
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#endif
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/* All mips targets store doubles in a register pair with the least
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significant register in the lower numbered register.
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If the target is big endian, double register values need conversion
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between memory and register formats. */
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extern void mips_register_convert_to_type (int regnum,
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struct type *type,
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char *buffer);
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extern void mips_register_convert_from_type (int regnum,
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struct type *type,
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char *buffer);
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#define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
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mips_register_convert_to_type ((n), (type), (buffer))
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#define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
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mips_register_convert_from_type ((n), (type), (buffer))
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/* Special symbol found in blocks associated with routines. We can hang
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mips_extra_func_info_t's off of this. */
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#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
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extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
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/* Specific information about a procedure.
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This overlays the MIPS's PDR records,
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mipsread.c (ab)uses this to save memory */
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typedef struct mips_extra_func_info
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{
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long numargs; /* number of args to procedure (was iopt) */
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bfd_vma high_addr; /* upper address bound */
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long frame_adjust; /* offset of FP from SP (used on MIPS16) */
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PDR pdr; /* Procedure descriptor record */
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}
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*mips_extra_func_info_t;
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extern void mips_print_extra_frame_info (struct frame_info *frame);
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#define PRINT_EXTRA_FRAME_INFO(fi) \
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mips_print_extra_frame_info (fi)
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/* It takes two values to specify a frame on the MIPS.
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In fact, the *PC* is the primary value that sets up a frame. The
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PC is looked up to see what function it's in; symbol information
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from that function tells us which register is the frame pointer
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base, and what offset from there is the "virtual frame pointer".
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(This is usually an offset from SP.) On most non-MIPS machines,
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the primary value is the SP, and the PC, if needed, disambiguates
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multiple functions with the same SP. But on the MIPS we can't do
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that since the PC is not stored in the same part of the frame every
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time. This does not seem to be a very clever way to set up frames,
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but there is nothing we can do about that. */
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#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
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extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
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/* Select the default mips disassembler */
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#define TM_PRINT_INSN_MACH 0
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/* These are defined in mdebugread.c and are used in mips-tdep.c */
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extern CORE_ADDR sigtramp_address, sigtramp_end;
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extern void fixup_sigtramp (void);
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/* Defined in mips-tdep.c and used in remote-mips.c */
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extern char *mips_read_processor_type (void);
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/* Functions for dealing with MIPS16 call and return stubs. */
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#define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc)
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extern int mips_ignore_helper (CORE_ADDR pc);
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#ifndef TARGET_MIPS
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#define TARGET_MIPS
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#endif
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/* Definitions and declarations used by mips-tdep.c and remote-mips.c */
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#define MIPS_INSTLEN 4 /* Length of an instruction */
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#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16 */
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#define MIPS_NUMREGS 32 /* Number of integer or float registers */
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typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
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/* MIPS16 function addresses are odd (bit 0 is set). Here are some
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macros to test, set, or clear bit 0 of addresses. */
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#define IS_MIPS16_ADDR(addr) ((addr) & 1)
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#define MAKE_MIPS16_ADDR(addr) ((addr) | 1)
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#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
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#endif /* TM_MIPS_H */
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/* Command to set the processor type. */
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extern void mips_set_processor_type_command (char *, int);
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/* Single step based on where the current instruction will take us. */
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extern void mips_software_single_step (enum target_signal, int);
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