ff6f572f8b
if there are no FPA registers. (arm_dwarf_reg_to_regnum): New function. (arm_register_type, arm_register_name): Return minimal values for unsupported registers. (arm_register_sim_regno): Handle iWMMXt registers. (arm_gdbarch_init): Record missing FPA registers if indicated by a target description. Recognize iWMMXt registers. Only register "info float" for FPA. Use ARM_NUM_REGS. Register arm_dwarf_reg_to_regnum. * arm-tdep.h (enum gdb_regnum): Add ARM_NUM_REGS and iWMMXt constants. (struct gdbarch_tdep): Add have_fpa_registers. * features/xscale-iwmmxt.xml: Update capitalization. * regformats/arm-with-iwmmxt.dat: Regenerated. * src/gdb/doc/gdb.texinfo (Standard Target Features): Mention case insensitivity. (ARM Features): Describe org.gnu.gdb.xscale.iwmmxt. * gdb.arch/iwmmxt-regs.c, gdb.arch/iwmmxt-regs.exp: Update register capitalization.
44 lines
1.9 KiB
XML
44 lines
1.9 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2007 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.xscale.iwmmxt">
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<vector id="iwmmxt_v8u8" type="uint8" count="8"/>
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<vector id="iwmmxt_v4u16" type="uint16" count="4"/>
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<vector id="iwmmxt_v2u32" type="uint32" count="2"/>
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<union id="iwmmxt_vec64i">
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<field name="u8" type="iwmmxt_v8u8"/>
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<field name="u16" type="iwmmxt_v4u16"/>
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<field name="u32" type="iwmmxt_v2u32"/>
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<field name="u64" type="uint64"/>
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</union>
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<reg name="wR0" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR1" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR2" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR3" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR4" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR5" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR6" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR7" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR8" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR9" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR10" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR11" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR12" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR13" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR14" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wR15" bitsize="64" type="iwmmxt_vec64i"/>
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<reg name="wCSSF" bitsize="32" type="int" group="vector"/>
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<reg name="wCASF" bitsize="32" type="int" group="vector"/>
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<reg name="wCGR0" bitsize="32" type="int" group="vector"/>
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<reg name="wCGR1" bitsize="32" type="int" group="vector"/>
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<reg name="wCGR2" bitsize="32" type="int" group="vector"/>
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<reg name="wCGR3" bitsize="32" type="int" group="vector"/>
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</feature>
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