663a1470e1
* elf32-ppc.c (ppc_elf_tls_optimize): Catch more cases where old-style __tls_get_addr calls without marker relocs don't match their arg setup insn one for one. If such mismatches are found report the reloc and don't do any tls optimization. * elf64-ppc.c (ppc64_elf_tls_optimize): Likewise. ld/testsuite/ * ld-powerpc/tlsmark.s: Delete non-optimizable section. * ld-powerpc/tlsmark32.s: Likewise. * ld-powerpc/tlsmark.d: Adjust to suit. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d, * ld-powerpc/tlsopt1.s: New. * ld-powerpc/tlsopt2.d, * ld-powerpc/tlsopt2.s: New. * ld-powerpc/tlsopt3.d, * ld-powerpc/tlsopt3.s: New. * ld-powerpc/tlsopt4.d, * ld-powerpc/tlsopt4.s: New. * ld-powerpc/tlsopt1_32.d, * ld-powerpc/tlsopt1_32.s: New. * ld-powerpc/tlsopt2_32.d, * ld-powerpc/tlsopt2_32.s: New. * ld-powerpc/tlsopt3_32.d, * ld-powerpc/tlsopt3_32.s: New. * ld-powerpc/tlsopt4_32.d, * ld-powerpc/tlsopt4_32.s: New. * ld-powerpc/powerpc.exp: Run new tests.
44 lines
1.1 KiB
Makefile
44 lines
1.1 KiB
Makefile
#source: tlsopt4_32.s
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#source: tlslib32.s
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#as: -a32
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#ld: -melf32ppc
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#objdump: -dr
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#target: powerpc*-*-*
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.*: +file format elf32-powerpc
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Disassembly of section \.text:
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0+1800094 <__tls_get_addr>:
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1800094: 4e 80 00 20 blr
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Disassembly of section \.opt1:
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0+1800098 <\.opt1>:
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1800098: 3c 62 00 00 addis r3,r2,0
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180009c: 2c 04 00 00 cmpwi r4,0
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18000a0: 41 82 00 0c beq- .*
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18000a4: 38 63 90 10 addi r3,r3,-28656
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18000a8: 48 00 00 08 b .*
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18000ac: 38 63 90 10 addi r3,r3,-28656
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Disassembly of section \.opt2:
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0+18000b0 <\.opt2>:
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18000b0: 3c 62 00 00 addis r3,r2,0
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18000b4: 2c 04 00 00 cmpwi r4,0
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18000b8: 41 82 00 08 beq- .*
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18000bc: 3c 62 00 00 addis r3,r2,0
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18000c0: 38 63 90 10 addi r3,r3,-28656
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Disassembly of section \.opt3:
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0+18000c4 <\.opt3>:
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18000c4: 3c 62 00 00 addis r3,r2,0
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18000c8: 48 00 00 0c b .*
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18000cc: 3c 62 00 00 addis r3,r2,0
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18000d0: 48 00 00 0c b .*
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18000d4: 38 63 90 10 addi r3,r3,-28656
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18000d8: 48 00 00 08 b .*
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18000dc: 38 63 90 08 addi r3,r3,-28664
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#pass
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