325801bda4
gas/ChangeLog: 2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * app.c (app_push): use XNEW macro. * as.c: Likewise. * config/obj-elf.c (obj_elf_change_section): Likewise. (elf_copy_symbol_attributes): Likewise. (obj_elf_size): Likewise. (build_group_lists): Likewise. * config/tc-aarch64.c (add_operand_error_record): Likewise. (md_assemble): Likewise. (tc_gen_reloc): Likewise. (get_upper_str): Likewise. (aarch64_parse_features): Likewise. * config/tc-arm.c (insert_reg_alias): Likewise. (insert_neon_reg_alias): Likewise. (find_or_make_literal_pool): Likewise. (s_arm_elf_cons): Likewise. (add_unwind_opcode): Likewise. (arm_parse_extension): Likewise. * config/tc-avr.c (create_record_for_frag): Likewise. * config/tc-crx.c: Likewise. * config/tc-d30v.c: Likewise. * config/tc-dlx.c (s_proc): Likewise. * config/tc-ft32.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c (pa_proc): Likewise. (create_new_space): Likewise. (create_new_subspace): Likewise. * config/tc-i860.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-iq2000.c (iq2000_add_macro): Likewise. (iq2000_record_hi16): Likewise. * config/tc-m32c.c (m32c_indirect_operand): Likewise. * config/tc-m32r.c (debug_sym): Likewise. (m32r_record_hi16): Likewise. * config/tc-m68k.c (m68k_ip): Likewise. (md_begin): Likewise. * config/tc-mcore.c: Likewise. * config/tc-microblaze.c (check_got): Likewise. * config/tc-mips.c (append_insn): Likewise. (s_mipsset): Likewise. (mips_record_label): Likewise. (s_mips_end): Likewise. * config/tc-mmix.c (mmix_frob_file): Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-moxie.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise. * config/tc-ns32k.c: Likewise. * config/tc-or1k.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-pj.c (fake_opcode): Likewise. * config/tc-ppc.c (ppc_apuinfo_section_add): Likewise. (ppc_macro): Likewise. (ppc_dwsect): Likewise. (ppc_machine): Likewise. * config/tc-rl78.c (rl78_frag_init): Likewise. * config/tc-rx.c (rx_frag_init): Likewise. * config/tc-s390.c (s390_lit_suffix): Likewise. (s390_machine): Likewise. (s390_machinemode): Likewise. * config/tc-score.c (s3_insert_reg): Likewise. (s3_gen_reloc): Likewise. * config/tc-score7.c (s7_insert_reg): Likewise. (s7_gen_reloc): Likewise. * config/tc-tic30.c (tic30_operand): Likewise. * config/tc-tic4x.c (tic4x_inst_make): Likewise. * config/tc-tic54x.c (stag_add_field): Likewise. (tic54x_struct): Likewise. (tic54x_space): Likewise. (tic54x_field): Likewise. (tic54x_mlib): Likewise. (subsym_substitute): Likewise. * config/tc-tic6x.c (tic6x_frob_label): Likewise. * config/tc-vax.c: Likewise. * config/tc-xc16x.c: Likewise. * config/tc-xtensa.c (xtensa_add_insn_label): Likewise. (directive_push): Likewise. (xtensa_begin_directive): Likewise. (tokenize_arguments): Likewise. (xtensa_add_literal_sym): Likewise. (new_resource_table): Likewise. (resize_resource_table): Likewise. (emit_single_op): Likewise. (xtensa_create_trampoline_frag): Likewise. (xtensa_maybe_create_literal_pool_frag): Likewise. (xtensa_add_config_info): Likewise. (xtensa_realloc_fixup_cache): Likewise. (add_subseg_info): Likewise. (cache_literal_section): Likewise. (add_xt_block_frags): Likewise. (add_xt_prop_frags): Likewise. (init_op_placement_info_table): Likewise. (build_section_rename): Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * depend.c (register_dependency): Likewise. * dwarf2dbg.c (get_line_subseg): Likewise. (dwarf2_gen_line_info_1): Likewise. (get_filenum): Likewise. * ecoff.c (allocate_scope): Likewise. (allocate_vlinks): Likewise. (allocate_shash): Likewise. (allocate_thash): Likewise. (allocate_tag): Likewise. (allocate_forward): Likewise. (allocate_thead): Likewise. (allocate_lineno_list): Likewise. * expr.c (make_expr_symbol): Likewise. * hash.c (hash_new_sized): Likewise. * input-file.c (input_file_push): Likewise. * listing.c (file_info): Likewise. (listing_newline): Likewise. * macro.c (new_formal): Likewise. (define_macro): Likewise. * remap.c (add_debug_prefix_map): Likewise. * symbols.c (symbol_find_noref): Likewise. (define_dollar_label): Likewise. (fb_label_instance_inc): Likewise. (symbol_relc_make_value): Likewise.
1565 lines
35 KiB
C
1565 lines
35 KiB
C
/* tc-z8k.c -- Assemble code for the Zilog Z800n
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Copyright (C) 1992-2016 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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/* Written By Steve Chamberlain <sac@cygnus.com>. */
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#include "as.h"
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#include "safe-ctype.h"
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#define DEFINE_TABLE
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#include "opcodes/z8k-opc.h"
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const char comment_chars[] = "!";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = ";";
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extern int machine;
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extern int coff_flags;
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int segmented_mode;
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/* This is non-zero if target was set from the command line.
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If non-zero, 1 means Z8002 (non-segmented), 2 means Z8001 (segmented). */
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static int z8k_target_from_cmdline;
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static void
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s_segm (int segm)
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{
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if (segm)
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{
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segmented_mode = 1;
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bfd_set_arch_mach (stdoutput, TARGET_ARCH, bfd_mach_z8001);
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}
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else
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{
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segmented_mode = 0;
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bfd_set_arch_mach (stdoutput, TARGET_ARCH, bfd_mach_z8002);
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}
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}
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static void
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even (int ignore ATTRIBUTE_UNUSED)
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{
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frag_align (1, 0, 0);
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record_alignment (now_seg, 1);
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}
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static int
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tohex (int c)
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{
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if (ISDIGIT (c))
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return c - '0';
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if (ISLOWER (c))
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return c - 'a' + 10;
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return c - 'A' + 10;
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}
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static void
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sval (int ignore ATTRIBUTE_UNUSED)
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{
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SKIP_WHITESPACE ();
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if (*input_line_pointer == '\'')
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{
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int c;
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input_line_pointer++;
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c = *input_line_pointer++;
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while (c != '\'')
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{
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if (c == '%')
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{
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c = (tohex (input_line_pointer[0]) << 4)
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| tohex (input_line_pointer[1]);
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input_line_pointer += 2;
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}
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FRAG_APPEND_1_CHAR (c);
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c = *input_line_pointer++;
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}
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demand_empty_rest_of_line ();
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}
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}
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/* This table describes all the machine specific pseudo-ops the assembler
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has to support. The fields are:
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function
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*/
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const pseudo_typeS md_pseudo_table[] = {
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{"int" , cons , 2},
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{"data.b" , cons , 1},
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{"data.w" , cons , 2},
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{"data.l" , cons , 4},
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{"form" , listing_psize , 0},
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{"heading", listing_title , 0},
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{"import" , s_ignore , 0},
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{"page" , listing_eject , 0},
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{"program", s_ignore , 0},
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{"z8001" , s_segm , 1},
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{"z8002" , s_segm , 0},
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{"segm" , s_segm , 1},
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{"unsegm" , s_segm , 0},
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{"unseg" , s_segm , 0},
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{"name" , s_app_file , 0},
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{"global" , s_globl , 0},
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{"wval" , cons , 2},
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{"lval" , cons , 4},
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{"bval" , cons , 1},
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{"sval" , sval , 0},
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{"rsect" , obj_coff_section, 0},
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{"sect" , obj_coff_section, 0},
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{"block" , s_space , 0},
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{"even" , even , 0},
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{0 , 0 , 0}
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};
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const char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant.
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As in 0f12.456
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or 0d1.2345e12 */
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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/* Opcode mnemonics. */
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static struct hash_control *opcode_hash_control;
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void
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md_begin (void)
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{
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const opcode_entry_type *opcode;
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int idx = -1;
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opcode_hash_control = hash_new ();
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for (opcode = z8k_table; opcode->name; opcode++)
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{
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/* Only enter unique codes into the table. */
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if (idx != opcode->idx)
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hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
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idx = opcode->idx;
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}
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/* Default to z8002. */
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s_segm (z8k_target_from_cmdline ? z8k_target_from_cmdline - 1 : 0);
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/* Insert the pseudo ops, too. */
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for (idx = 0; md_pseudo_table[idx].poc_name; idx++)
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{
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opcode_entry_type *fake_opcode;
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fake_opcode = XNEW (opcode_entry_type);
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fake_opcode->name = md_pseudo_table[idx].poc_name;
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fake_opcode->func = (void *) (md_pseudo_table + idx);
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fake_opcode->opcode = 250;
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hash_insert (opcode_hash_control, fake_opcode->name, fake_opcode);
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}
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}
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typedef struct z8k_op {
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/* CLASS_REG_xxx. */
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int regsize;
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/* 0 .. 15. */
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unsigned int reg;
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int mode;
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/* Any other register associated with the mode. */
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unsigned int x_reg;
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/* Any expression. */
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expressionS exp;
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} op_type;
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static expressionS *da_operand;
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static expressionS *imm_operand;
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static int reg[16];
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static int the_cc;
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static int the_ctrl;
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static int the_flags;
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static int the_interrupt;
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/* Determine register number. src points to the ascii number
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(after "rl", "rh", "r", "rr", or "rq"). If a character
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outside the set of {0,',',')','('} follows the number,
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return NULL to indicate that it's not a valid register
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number. */
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static char *
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whatreg (unsigned int *preg, char *src)
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{
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unsigned int new_reg;
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/* src[0] is already known to be a digit. */
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if (ISDIGIT (src[1]))
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{
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new_reg = (src[0] - '0') * 10 + src[1] - '0';
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src += 2;
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}
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else
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{
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new_reg = (src[0] - '0');
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src += 1;
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}
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if (src[0] != 0 && src[0] != ',' && src[0] != '(' && src[0] != ')')
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return NULL;
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*preg = new_reg;
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return src;
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}
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/* Parse operands
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rh0-rh7, rl0-rl7
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r0-r15
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rr0-rr14
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rq0--rq12
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WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
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r0l,r0h,..r7l,r7h
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@WREG
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@WREG+
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@-WREG
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#const
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*/
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/* Try to parse a reg name. Return a pointer to the first character
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in SRC after the reg name. */
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static char *
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parse_reg (char *src, int *mode, unsigned int *preg)
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{
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char *res = NULL;
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char regno;
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/* Check for stack pointer "sp" alias. */
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if ((src[0] == 's' || src[0] == 'S')
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&& (src[1] == 'p' || src[1] == 'P')
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&& (src[2] == 0 || src[2] == ','))
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{
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if (segmented_mode)
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{
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*mode = CLASS_REG_LONG;
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*preg = 14;
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}
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else
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{
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*mode = CLASS_REG_WORD;
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*preg = 15;
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}
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return src + 2;
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}
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if (src[0] == 'r' || src[0] == 'R')
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{
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if (src[1] == 'r' || src[1] == 'R')
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{
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if (src[2] < '0' || src[2] > '9')
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return NULL; /* Assume no register name but a label starting with 'rr'. */
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*mode = CLASS_REG_LONG;
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res = whatreg (preg, src + 2);
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if (res == NULL)
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return NULL; /* Not a valid register name. */
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regno = *preg;
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if (regno > 14)
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as_bad (_("register rr%d out of range"), regno);
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if (regno & 1)
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as_bad (_("register rr%d does not exist"), regno);
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}
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else if (src[1] == 'h' || src[1] == 'H')
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{
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if (src[2] < '0' || src[2] > '9')
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return NULL; /* Assume no register name but a label starting with 'rh'. */
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*mode = CLASS_REG_BYTE;
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res = whatreg (preg, src + 2);
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if (res == NULL)
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return NULL; /* Not a valid register name. */
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regno = *preg;
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if (regno > 7)
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as_bad (_("register rh%d out of range"), regno);
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}
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else if (src[1] == 'l' || src[1] == 'L')
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{
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if (src[2] < '0' || src[2] > '9')
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return NULL; /* Assume no register name but a label starting with 'rl'. */
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*mode = CLASS_REG_BYTE;
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res = whatreg (preg, src + 2);
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if (res == NULL)
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return NULL; /* Not a valid register name. */
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regno = *preg;
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if (regno > 7)
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as_bad (_("register rl%d out of range"), regno);
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*preg += 8;
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}
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else if (src[1] == 'q' || src[1] == 'Q')
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{
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if (src[2] < '0' || src[2] > '9')
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return NULL; /* Assume no register name but a label starting with 'rq'. */
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*mode = CLASS_REG_QUAD;
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res = whatreg (preg, src + 2);
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if (res == NULL)
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return NULL; /* Not a valid register name. */
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regno = *preg;
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if (regno > 12)
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as_bad (_("register rq%d out of range"), regno);
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if (regno & 3)
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as_bad (_("register rq%d does not exist"), regno);
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}
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else
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{
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if (src[1] < '0' || src[1] > '9')
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return NULL; /* Assume no register name but a label starting with 'r'. */
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*mode = CLASS_REG_WORD;
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res = whatreg (preg, src + 1);
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if (res == NULL)
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return NULL; /* Not a valid register name. */
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regno = *preg;
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if (regno > 15)
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as_bad (_("register r%d out of range"), regno);
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}
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}
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return res;
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}
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static char *
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parse_exp (char *s, expressionS *op)
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{
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char *save = input_line_pointer;
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char *new_pointer;
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input_line_pointer = s;
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expression (op);
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if (op->X_op == O_absent)
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as_bad (_("missing operand"));
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new_pointer = input_line_pointer;
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input_line_pointer = save;
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return new_pointer;
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}
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/* The many forms of operand:
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<rb>
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<r>
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<rr>
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<rq>
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@r
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#exp
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exp
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exp(r)
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r(#exp)
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r(r)
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*/
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static char *
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checkfor (char *ptr, char what)
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{
|
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if (*ptr == what)
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ptr++;
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else
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as_bad (_("expected %c"), what);
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return ptr;
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}
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/* Make sure the mode supplied is the size of a word. */
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static void
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regword (int mode, const char *string)
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{
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int ok;
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ok = CLASS_REG_WORD;
|
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if (ok != mode)
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{
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as_bad (_("register is wrong size for a word %s"), string);
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}
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}
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|
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/* Make sure the mode supplied is the size of an address. */
|
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static void
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regaddr (int mode, const char *string)
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{
|
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int ok;
|
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ok = segmented_mode ? CLASS_REG_LONG : CLASS_REG_WORD;
|
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if (ok != mode)
|
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{
|
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as_bad (_("register is wrong size for address %s"), string);
|
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}
|
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}
|
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|
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struct ctrl_names {
|
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int value;
|
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const char *name;
|
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};
|
||
|
||
static struct ctrl_names ctrl_table[] = {
|
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{ 0x1, "flags" }, /* ldctlb only. */
|
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{ 0x2, "fcw" }, /* ldctl only. Applies to all remaining control registers. */
|
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{ 0x3, "refresh" },
|
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{ 0x4, "psapseg" },
|
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{ 0x5, "psapoff" },
|
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{ 0x5, "psap" },
|
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{ 0x6, "nspseg" },
|
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{ 0x7, "nspoff" },
|
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{ 0x7, "nsp" },
|
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{ 0 , 0 }
|
||
};
|
||
|
||
static void
|
||
get_ctrl_operand (char **ptr, struct z8k_op *mode, unsigned int dst ATTRIBUTE_UNUSED)
|
||
{
|
||
char *src = *ptr;
|
||
int i, l;
|
||
|
||
while (*src == ' ')
|
||
src++;
|
||
|
||
mode->mode = CLASS_CTRL;
|
||
for (i = 0; ctrl_table[i].name; i++)
|
||
{
|
||
l = strlen (ctrl_table[i].name);
|
||
if (! strncasecmp (ctrl_table[i].name, src, l))
|
||
{
|
||
the_ctrl = ctrl_table[i].value;
|
||
if (*(src + l) && *(src + l) != ',')
|
||
break;
|
||
*ptr = src + l; /* Valid control name found: "consume" it. */
|
||
return;
|
||
}
|
||
}
|
||
the_ctrl = 0;
|
||
}
|
||
|
||
struct flag_names {
|
||
int value;
|
||
const char *name;
|
||
};
|
||
|
||
static struct flag_names flag_table[] = {
|
||
{ 0x1, "P" },
|
||
{ 0x1, "V" },
|
||
{ 0x2, "S" },
|
||
{ 0x4, "Z" },
|
||
{ 0x8, "C" },
|
||
{ 0x0, "+" },
|
||
{ 0x0, "," },
|
||
{ 0, 0 }
|
||
};
|
||
|
||
static void
|
||
get_flags_operand (char **ptr, struct z8k_op *mode, unsigned int dst ATTRIBUTE_UNUSED)
|
||
{
|
||
char *src = *ptr;
|
||
char c;
|
||
int i;
|
||
int j;
|
||
|
||
while (*src == ' ')
|
||
src++;
|
||
|
||
mode->mode = CLASS_FLAGS;
|
||
the_flags = 0;
|
||
for (j = 0; j <= 9; j++)
|
||
{
|
||
if (!src[j])
|
||
goto done;
|
||
c = TOUPPER(src[j]);
|
||
for (i = 0; flag_table[i].name; i++)
|
||
{
|
||
if (flag_table[i].name[0] == c)
|
||
{
|
||
the_flags = the_flags | flag_table[i].value;
|
||
goto match;
|
||
}
|
||
}
|
||
goto done;
|
||
match:
|
||
;
|
||
}
|
||
done:
|
||
*ptr = src + j;
|
||
}
|
||
|
||
struct interrupt_names {
|
||
int value;
|
||
const char *name;
|
||
};
|
||
|
||
static struct interrupt_names intr_table[] = {
|
||
{ 0x1, "nvi" },
|
||
{ 0x2, "vi" },
|
||
{ 0x3, "both" },
|
||
{ 0x3, "all" },
|
||
{ 0, 0 }
|
||
};
|
||
|
||
static void
|
||
get_interrupt_operand (char **ptr, struct z8k_op *mode, unsigned int dst ATTRIBUTE_UNUSED)
|
||
{
|
||
char *src = *ptr;
|
||
int i, l;
|
||
|
||
while (*src == ' ')
|
||
src++;
|
||
|
||
mode->mode = CLASS_IMM;
|
||
the_interrupt = 0;
|
||
|
||
while (*src)
|
||
{
|
||
for (i = 0; intr_table[i].name; i++)
|
||
{
|
||
l = strlen (intr_table[i].name);
|
||
if (! strncasecmp (intr_table[i].name, src, l))
|
||
{
|
||
the_interrupt |= intr_table[i].value;
|
||
if (*(src + l) && *(src + l) != ',')
|
||
{
|
||
*ptr = src + l;
|
||
invalid:
|
||
as_bad (_("unknown interrupt %s"), src);
|
||
while (**ptr && ! is_end_of_line[(unsigned char) **ptr])
|
||
(*ptr)++; /* Consume rest of line. */
|
||
return;
|
||
}
|
||
src += l;
|
||
if (! *src)
|
||
{
|
||
*ptr = src;
|
||
return;
|
||
}
|
||
}
|
||
}
|
||
if (*src == ',')
|
||
src++;
|
||
else
|
||
{
|
||
*ptr = src;
|
||
goto invalid;
|
||
}
|
||
}
|
||
|
||
/* No interrupt type specified, opcode won't do anything. */
|
||
as_warn (_("opcode has no effect"));
|
||
the_interrupt = 0x0;
|
||
}
|
||
|
||
struct cc_names {
|
||
int value;
|
||
const char *name;
|
||
};
|
||
|
||
static struct cc_names table[] = {
|
||
{ 0x0, "f" },
|
||
{ 0x1, "lt" },
|
||
{ 0x2, "le" },
|
||
{ 0x3, "ule" },
|
||
{ 0x4, "ov/pe" },
|
||
{ 0x4, "ov" },
|
||
{ 0x4, "pe/ov" },
|
||
{ 0x4, "pe" },
|
||
{ 0x5, "mi" },
|
||
{ 0x6, "eq" },
|
||
{ 0x6, "z" },
|
||
{ 0x7, "c/ult" },
|
||
{ 0x7, "c" },
|
||
{ 0x7, "ult/c" },
|
||
{ 0x7, "ult" },
|
||
{ 0x8, "t" },
|
||
{ 0x9, "ge" },
|
||
{ 0xa, "gt" },
|
||
{ 0xb, "ugt" },
|
||
{ 0xc, "nov/po" },
|
||
{ 0xc, "nov" },
|
||
{ 0xc, "po/nov" },
|
||
{ 0xc, "po" },
|
||
{ 0xd, "pl" },
|
||
{ 0xe, "ne" },
|
||
{ 0xe, "nz" },
|
||
{ 0xf, "nc/uge" },
|
||
{ 0xf, "nc" },
|
||
{ 0xf, "uge/nc" },
|
||
{ 0xf, "uge" },
|
||
{ 0 , 0 }
|
||
};
|
||
|
||
static void
|
||
get_cc_operand (char **ptr, struct z8k_op *mode, unsigned int dst ATTRIBUTE_UNUSED)
|
||
{
|
||
char *src = *ptr;
|
||
int i, l;
|
||
|
||
while (*src == ' ')
|
||
src++;
|
||
|
||
mode->mode = CLASS_CC;
|
||
for (i = 0; table[i].name; i++)
|
||
{
|
||
l = strlen (table[i].name);
|
||
if (! strncasecmp (table[i].name, src, l))
|
||
{
|
||
the_cc = table[i].value;
|
||
if (*(src + l) && *(src + l) != ',')
|
||
break;
|
||
*ptr = src + l; /* Valid cc found: "consume" it. */
|
||
return;
|
||
}
|
||
}
|
||
the_cc = 0x8; /* Not recognizing the cc defaults to t. (Assuming no cc present.) */
|
||
}
|
||
|
||
static void
|
||
get_operand (char **ptr, struct z8k_op *mode, unsigned int dst ATTRIBUTE_UNUSED)
|
||
{
|
||
char *src = *ptr;
|
||
char *end;
|
||
|
||
mode->mode = 0;
|
||
|
||
while (*src == ' ')
|
||
src++;
|
||
if (*src == '#')
|
||
{
|
||
mode->mode = CLASS_IMM;
|
||
imm_operand = &(mode->exp);
|
||
src = parse_exp (src + 1, &(mode->exp));
|
||
}
|
||
else if (*src == '@')
|
||
{
|
||
mode->mode = CLASS_IR;
|
||
src = parse_reg (src + 1, &mode->regsize, &mode->reg);
|
||
}
|
||
else
|
||
{
|
||
unsigned int regn;
|
||
|
||
end = parse_reg (src, &mode->mode, ®n);
|
||
|
||
if (end)
|
||
{
|
||
int nw;
|
||
unsigned int nr;
|
||
|
||
src = end;
|
||
if (*src == '(')
|
||
{
|
||
src++;
|
||
end = parse_reg (src, &nw, &nr);
|
||
if (end)
|
||
{
|
||
/* Got Ra(Rb). */
|
||
src = end;
|
||
|
||
if (*src != ')')
|
||
as_bad (_("Missing ) in ra(rb)"));
|
||
else
|
||
src++;
|
||
|
||
regaddr (mode->mode, "ra(rb) ra");
|
||
mode->mode = CLASS_BX;
|
||
mode->reg = regn;
|
||
mode->x_reg = nr;
|
||
reg[ARG_RX] = nr;
|
||
}
|
||
else
|
||
{
|
||
/* Got Ra(disp). */
|
||
if (*src == '#')
|
||
src++;
|
||
src = parse_exp (src, &(mode->exp));
|
||
src = checkfor (src, ')');
|
||
mode->mode = CLASS_BA;
|
||
mode->reg = regn;
|
||
mode->x_reg = 0;
|
||
imm_operand = &(mode->exp);
|
||
}
|
||
}
|
||
else
|
||
{
|
||
mode->reg = regn;
|
||
mode->x_reg = 0;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* No initial reg. */
|
||
src = parse_exp (src, &(mode->exp));
|
||
if (*src == '(')
|
||
{
|
||
src++;
|
||
end = parse_reg (src, &(mode->mode), ®n);
|
||
regword (mode->mode, "addr(Ra) ra");
|
||
mode->mode = CLASS_X;
|
||
mode->reg = regn;
|
||
mode->x_reg = 0;
|
||
da_operand = &(mode->exp);
|
||
src = checkfor (end, ')');
|
||
}
|
||
else
|
||
{
|
||
/* Just an address. */
|
||
mode->mode = CLASS_DA;
|
||
mode->reg = 0;
|
||
mode->x_reg = 0;
|
||
da_operand = &(mode->exp);
|
||
}
|
||
}
|
||
}
|
||
*ptr = src;
|
||
}
|
||
|
||
static char *
|
||
get_operands (const opcode_entry_type *opcode, char *op_end, op_type *operand)
|
||
{
|
||
char *ptr = op_end;
|
||
char *savptr;
|
||
|
||
switch (opcode->noperands)
|
||
{
|
||
case 0:
|
||
operand[0].mode = 0;
|
||
operand[1].mode = 0;
|
||
while (*ptr == ' ')
|
||
ptr++;
|
||
break;
|
||
|
||
case 1:
|
||
if (opcode->arg_info[0] == CLASS_CC)
|
||
{
|
||
get_cc_operand (&ptr, operand + 0, 0);
|
||
while (*ptr == ' ')
|
||
ptr++;
|
||
if (*ptr && ! is_end_of_line[(unsigned char) *ptr])
|
||
{
|
||
as_bad (_("invalid condition code '%s'"), ptr);
|
||
while (*ptr && ! is_end_of_line[(unsigned char) *ptr])
|
||
ptr++; /* Consume rest of line. */
|
||
}
|
||
}
|
||
else if (opcode->arg_info[0] == CLASS_FLAGS)
|
||
{
|
||
get_flags_operand (&ptr, operand + 0, 0);
|
||
while (*ptr == ' ')
|
||
ptr++;
|
||
if (*ptr && ! is_end_of_line[(unsigned char) *ptr])
|
||
{
|
||
as_bad (_("invalid flag '%s'"), ptr);
|
||
while (*ptr && ! is_end_of_line[(unsigned char) *ptr])
|
||
ptr++; /* Consume rest of line. */
|
||
}
|
||
}
|
||
else if (opcode->arg_info[0] == (CLASS_IMM + (ARG_IMM2)))
|
||
get_interrupt_operand (&ptr, operand + 0, 0);
|
||
else
|
||
get_operand (&ptr, operand + 0, 0);
|
||
|
||
operand[1].mode = 0;
|
||
break;
|
||
|
||
case 2:
|
||
savptr = ptr;
|
||
if (opcode->arg_info[0] == CLASS_CC)
|
||
{
|
||
get_cc_operand (&ptr, operand + 0, 0);
|
||
while (*ptr == ' ')
|
||
ptr++;
|
||
if (*ptr != ',' && strchr (ptr + 1, ','))
|
||
{
|
||
savptr = ptr;
|
||
while (*ptr != ',')
|
||
ptr++;
|
||
*ptr = 0;
|
||
ptr++;
|
||
as_bad (_("invalid condition code '%s'"), savptr);
|
||
}
|
||
}
|
||
else if (opcode->arg_info[0] == CLASS_CTRL)
|
||
{
|
||
get_ctrl_operand (&ptr, operand + 0, 0);
|
||
|
||
if (the_ctrl == 0)
|
||
{
|
||
ptr = savptr;
|
||
get_operand (&ptr, operand + 0, 0);
|
||
|
||
if (ptr == 0)
|
||
return NULL;
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_ctrl_operand (&ptr, operand + 1, 1);
|
||
if (the_ctrl == 0)
|
||
return NULL;
|
||
return ptr;
|
||
}
|
||
}
|
||
else
|
||
get_operand (&ptr, operand + 0, 0);
|
||
|
||
if (ptr == 0)
|
||
return NULL;
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_operand (&ptr, operand + 1, 1);
|
||
break;
|
||
|
||
case 3:
|
||
get_operand (&ptr, operand + 0, 0);
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_operand (&ptr, operand + 1, 1);
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_operand (&ptr, operand + 2, 2);
|
||
break;
|
||
|
||
case 4:
|
||
get_operand (&ptr, operand + 0, 0);
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_operand (&ptr, operand + 1, 1);
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_operand (&ptr, operand + 2, 2);
|
||
if (*ptr == ',')
|
||
ptr++;
|
||
get_cc_operand (&ptr, operand + 3, 3);
|
||
break;
|
||
|
||
default:
|
||
abort ();
|
||
}
|
||
|
||
return ptr;
|
||
}
|
||
|
||
/* Passed a pointer to a list of opcodes which use different
|
||
addressing modes. Return the opcode which matches the opcodes
|
||
provided. */
|
||
|
||
static opcode_entry_type *
|
||
get_specific (opcode_entry_type *opcode, op_type *operands)
|
||
{
|
||
opcode_entry_type *this_try = opcode;
|
||
int found = 0;
|
||
unsigned int noperands = opcode->noperands;
|
||
|
||
int this_index = opcode->idx;
|
||
|
||
while (this_index == opcode->idx && !found)
|
||
{
|
||
unsigned int i;
|
||
|
||
this_try = opcode++;
|
||
for (i = 0; i < noperands; i++)
|
||
{
|
||
unsigned int mode = operands[i].mode;
|
||
|
||
if (((mode & CLASS_MASK) == CLASS_IR) && ((this_try->arg_info[i] & CLASS_MASK) == CLASS_IRO))
|
||
{
|
||
mode = operands[i].mode = (operands[i].mode & ~CLASS_MASK) | CLASS_IRO;
|
||
}
|
||
|
||
if ((mode & CLASS_MASK) != (this_try->arg_info[i] & CLASS_MASK))
|
||
{
|
||
/* It could be a pc rel operand, if this is a da mode
|
||
and we like disps, then insert it. */
|
||
|
||
if (mode == CLASS_DA && this_try->arg_info[i] == CLASS_DISP)
|
||
{
|
||
/* This is the case. */
|
||
operands[i].mode = CLASS_DISP;
|
||
}
|
||
else if (mode == CLASS_BA && this_try->arg_info[i])
|
||
{
|
||
/* Can't think of a way to turn what we've been
|
||
given into something that's OK. */
|
||
goto fail;
|
||
}
|
||
else if (this_try->arg_info[i] & CLASS_PR)
|
||
{
|
||
if (mode == CLASS_REG_LONG && segmented_mode)
|
||
{
|
||
/* OK. */
|
||
}
|
||
else if (mode == CLASS_REG_WORD && !segmented_mode)
|
||
{
|
||
/* OK. */
|
||
}
|
||
else
|
||
goto fail;
|
||
}
|
||
else
|
||
goto fail;
|
||
}
|
||
switch (mode & CLASS_MASK)
|
||
{
|
||
default:
|
||
break;
|
||
case CLASS_IRO:
|
||
if (operands[i].regsize != CLASS_REG_WORD)
|
||
as_bad (_("invalid indirect register size"));
|
||
reg[this_try->arg_info[i] & ARG_MASK] = operands[i].reg;
|
||
break;
|
||
case CLASS_IR:
|
||
if ((segmented_mode && operands[i].regsize != CLASS_REG_LONG)
|
||
|| (!segmented_mode && operands[i].regsize != CLASS_REG_WORD))
|
||
as_bad (_("invalid indirect register size"));
|
||
reg[this_try->arg_info[i] & ARG_MASK] = operands[i].reg;
|
||
break;
|
||
case CLASS_X:
|
||
case CLASS_BA:
|
||
case CLASS_BX:
|
||
case CLASS_DISP:
|
||
case CLASS_REG:
|
||
case CLASS_REG_WORD:
|
||
case CLASS_REG_BYTE:
|
||
case CLASS_REG_QUAD:
|
||
case CLASS_REG_LONG:
|
||
case CLASS_REGN0:
|
||
reg[this_try->arg_info[i] & ARG_MASK] = operands[i].reg;
|
||
break;
|
||
case CLASS_CTRL:
|
||
if (this_try->opcode == OPC_ldctlb && the_ctrl != 1)
|
||
as_bad (_("invalid control register name"));
|
||
break;
|
||
}
|
||
}
|
||
|
||
found = 1;
|
||
fail:
|
||
;
|
||
}
|
||
if (found)
|
||
return this_try;
|
||
else
|
||
return 0;
|
||
}
|
||
|
||
static char buffer[20];
|
||
|
||
static void
|
||
newfix (int ptr, int type, int size, expressionS *operand)
|
||
{
|
||
int is_pcrel = 0;
|
||
fixS *fixP;
|
||
|
||
/* Size is in nibbles. */
|
||
if (operand->X_add_symbol
|
||
|| operand->X_op_symbol
|
||
|| operand->X_add_number)
|
||
{
|
||
switch(type)
|
||
{
|
||
case BFD_RELOC_8_PCREL:
|
||
case BFD_RELOC_Z8K_CALLR:
|
||
case BFD_RELOC_Z8K_DISP7:
|
||
is_pcrel = 1;
|
||
}
|
||
fixP = fix_new_exp (frag_now, ptr, size / 2,
|
||
operand, is_pcrel, type);
|
||
if (is_pcrel)
|
||
fixP->fx_no_overflow = 1;
|
||
}
|
||
}
|
||
|
||
static char *
|
||
apply_fix (char *ptr, int type, expressionS *operand, int size)
|
||
{
|
||
long n = operand->X_add_number;
|
||
|
||
/* size is in nibbles. */
|
||
|
||
newfix ((ptr - buffer) / 2, type, size + 1, operand);
|
||
switch (size)
|
||
{
|
||
case 8: /* 8 nibbles == 32 bits. */
|
||
*ptr++ = n >> 28;
|
||
*ptr++ = n >> 24;
|
||
*ptr++ = n >> 20;
|
||
*ptr++ = n >> 16;
|
||
case 4: /* 4 nibbles == 16 bits. */
|
||
*ptr++ = n >> 12;
|
||
*ptr++ = n >> 8;
|
||
case 2:
|
||
*ptr++ = n >> 4;
|
||
case 1:
|
||
*ptr++ = n >> 0;
|
||
break;
|
||
}
|
||
return ptr;
|
||
}
|
||
|
||
/* Now we know what sort of opcodes it is. Let's build the bytes. */
|
||
|
||
static void
|
||
build_bytes (opcode_entry_type *this_try, struct z8k_op *operand ATTRIBUTE_UNUSED)
|
||
{
|
||
char *output_ptr = buffer;
|
||
int c;
|
||
int nibble;
|
||
unsigned int *class_ptr;
|
||
|
||
frag_wane (frag_now);
|
||
frag_new (0);
|
||
|
||
if (frag_room () < 8)
|
||
frag_grow (8); /* Make room for maximum instruction size. */
|
||
|
||
memset (buffer, 0, sizeof (buffer));
|
||
class_ptr = this_try->byte_info;
|
||
|
||
for (nibble = 0; (c = *class_ptr++); nibble++)
|
||
{
|
||
|
||
switch (c & CLASS_MASK)
|
||
{
|
||
default:
|
||
abort ();
|
||
|
||
case CLASS_ADDRESS:
|
||
/* Direct address, we don't cope with the SS mode right now. */
|
||
if (segmented_mode)
|
||
{
|
||
/* da_operand->X_add_number |= 0x80000000; -- Now set at relocation time. */
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_32, da_operand, 8);
|
||
}
|
||
else
|
||
{
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_16, da_operand, 4);
|
||
}
|
||
da_operand = 0;
|
||
break;
|
||
case CLASS_DISP8:
|
||
/* pc rel 8 bit */
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_8_PCREL, da_operand, 2);
|
||
da_operand = 0;
|
||
break;
|
||
|
||
case CLASS_0DISP7:
|
||
/* pc rel 7 bit */
|
||
*output_ptr = 0;
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_Z8K_DISP7, da_operand, 2);
|
||
da_operand = 0;
|
||
break;
|
||
|
||
case CLASS_1DISP7:
|
||
/* pc rel 7 bit */
|
||
*output_ptr = 0x80;
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_Z8K_DISP7, da_operand, 2);
|
||
output_ptr[-2] = 0x8;
|
||
da_operand = 0;
|
||
break;
|
||
|
||
case CLASS_BIT_1OR2:
|
||
*output_ptr = c & 0xf;
|
||
if (imm_operand)
|
||
{
|
||
if (imm_operand->X_add_number == 2)
|
||
*output_ptr |= 2;
|
||
else if (imm_operand->X_add_number != 1)
|
||
as_bad (_("immediate must be 1 or 2"));
|
||
}
|
||
else
|
||
as_bad (_("immediate 1 or 2 expected"));
|
||
output_ptr++;
|
||
break;
|
||
case CLASS_CC:
|
||
*output_ptr++ = the_cc;
|
||
break;
|
||
case CLASS_0CCC:
|
||
if (the_ctrl < 2 || the_ctrl > 7)
|
||
as_bad (_("invalid control register name"));
|
||
*output_ptr++ = the_ctrl;
|
||
break;
|
||
case CLASS_1CCC:
|
||
if (the_ctrl < 2 || the_ctrl > 7)
|
||
as_bad (_("invalid control register name"));
|
||
*output_ptr++ = the_ctrl | 0x8;
|
||
break;
|
||
case CLASS_00II:
|
||
*output_ptr++ = (~the_interrupt & 0x3);
|
||
break;
|
||
case CLASS_01II:
|
||
*output_ptr++ = (~the_interrupt & 0x3) | 0x4;
|
||
break;
|
||
case CLASS_FLAGS:
|
||
*output_ptr++ = the_flags;
|
||
break;
|
||
case CLASS_IGNORE:
|
||
case CLASS_BIT:
|
||
*output_ptr++ = c & 0xf;
|
||
break;
|
||
case CLASS_REGN0:
|
||
if (reg[c & 0xf] == 0)
|
||
as_bad (_("can't use R0 here"));
|
||
/* Fall through. */
|
||
case CLASS_REG:
|
||
case CLASS_REG_BYTE:
|
||
case CLASS_REG_WORD:
|
||
case CLASS_REG_LONG:
|
||
case CLASS_REG_QUAD:
|
||
/* Insert bit mattern of right reg. */
|
||
*output_ptr++ = reg[c & 0xf];
|
||
break;
|
||
case CLASS_DISP:
|
||
switch (c & ARG_MASK)
|
||
{
|
||
case ARG_DISP12:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_Z8K_CALLR, da_operand, 4);
|
||
break;
|
||
case ARG_DISP16:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_16_PCREL, da_operand, 4);
|
||
break;
|
||
default:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_16, da_operand, 4);
|
||
}
|
||
da_operand = 0;
|
||
break;
|
||
|
||
case CLASS_IMM:
|
||
{
|
||
switch (c & ARG_MASK)
|
||
{
|
||
case ARG_NIM4:
|
||
if (imm_operand->X_add_number > 15)
|
||
as_bad (_("immediate value out of range"));
|
||
imm_operand->X_add_number = -imm_operand->X_add_number;
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_Z8K_IMM4L, imm_operand, 1);
|
||
break;
|
||
/*case ARG_IMMNMINUS1: not used. */
|
||
case ARG_IMM4M1:
|
||
imm_operand->X_add_number--;
|
||
/* Drop through. */
|
||
case ARG_IMM4:
|
||
if (imm_operand->X_add_number > 15)
|
||
as_bad (_("immediate value out of range"));
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_Z8K_IMM4L, imm_operand, 1);
|
||
break;
|
||
case ARG_NIM8:
|
||
imm_operand->X_add_number = -imm_operand->X_add_number;
|
||
/* Drop through. */
|
||
case ARG_IMM8:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_8, imm_operand, 2);
|
||
break;
|
||
case ARG_IMM16:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_16, imm_operand, 4);
|
||
break;
|
||
case ARG_IMM32:
|
||
output_ptr = apply_fix (output_ptr, BFD_RELOC_32, imm_operand, 8);
|
||
break;
|
||
default:
|
||
abort ();
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Copy from the nibble buffer into the frag. */
|
||
{
|
||
int length = (output_ptr - buffer) / 2;
|
||
char *src = buffer;
|
||
char *fragp = frag_more (length);
|
||
|
||
while (src < output_ptr)
|
||
{
|
||
*fragp = (src[0] << 4) | src[1];
|
||
src += 2;
|
||
fragp++;
|
||
}
|
||
}
|
||
}
|
||
|
||
/* This is the guts of the machine-dependent assembler. STR points to a
|
||
machine dependent instruction. This function is supposed to emit
|
||
the frags/bytes it assembles to. */
|
||
|
||
void
|
||
md_assemble (char *str)
|
||
{
|
||
char c;
|
||
char *op_start;
|
||
char *op_end;
|
||
struct z8k_op operand[4];
|
||
opcode_entry_type *opcode;
|
||
|
||
/* Drop leading whitespace. */
|
||
while (*str == ' ')
|
||
str++;
|
||
|
||
/* Find the op code end. */
|
||
for (op_start = op_end = str;
|
||
*op_end != 0 && *op_end != ' ' && ! is_end_of_line[(unsigned char) *op_end];
|
||
op_end++)
|
||
;
|
||
|
||
if (op_end == op_start)
|
||
{
|
||
as_bad (_("can't find opcode "));
|
||
}
|
||
c = *op_end;
|
||
|
||
*op_end = 0; /* Zero-terminate op code string for hash_find() call. */
|
||
|
||
opcode = (opcode_entry_type *) hash_find (opcode_hash_control, op_start);
|
||
|
||
if (opcode == NULL)
|
||
{
|
||
as_bad (_("unknown opcode"));
|
||
return;
|
||
}
|
||
|
||
*op_end = c; /* Restore original string. */
|
||
|
||
if (opcode->opcode == 250)
|
||
{
|
||
pseudo_typeS *p;
|
||
char oc;
|
||
char *old = input_line_pointer;
|
||
|
||
/* Was really a pseudo op. */
|
||
|
||
input_line_pointer = op_end;
|
||
|
||
oc = *old;
|
||
*old = '\n';
|
||
while (*input_line_pointer == ' ')
|
||
input_line_pointer++;
|
||
p = (pseudo_typeS *) (opcode->func);
|
||
|
||
(p->poc_handler) (p->poc_val);
|
||
input_line_pointer = old;
|
||
*old = oc;
|
||
}
|
||
else
|
||
{
|
||
char *new_input_line_pointer;
|
||
|
||
new_input_line_pointer = get_operands (opcode, op_end, operand);
|
||
if (new_input_line_pointer)
|
||
{
|
||
input_line_pointer = new_input_line_pointer;
|
||
opcode = get_specific (opcode, operand);
|
||
}
|
||
|
||
if (new_input_line_pointer == NULL || opcode == NULL)
|
||
{
|
||
/* Couldn't find an opcode which matched the operands. */
|
||
char *where = frag_more (2);
|
||
|
||
where[0] = 0x0;
|
||
where[1] = 0x0;
|
||
|
||
as_bad (_("Can't find opcode to match operands"));
|
||
return;
|
||
}
|
||
|
||
build_bytes (opcode, operand);
|
||
}
|
||
}
|
||
|
||
/* We have no need to default values of symbols. */
|
||
|
||
symbolS *
|
||
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
|
||
{
|
||
return 0;
|
||
}
|
||
|
||
/* Various routines to kill one day. */
|
||
|
||
const char *
|
||
md_atof (int type, char *litP, int *sizeP)
|
||
{
|
||
return ieee_md_atof (type, litP, sizeP, TRUE);
|
||
}
|
||
|
||
const char *md_shortopts = "z:";
|
||
|
||
struct option md_longopts[] =
|
||
{
|
||
#define OPTION_RELAX (OPTION_MD_BASE)
|
||
{"linkrelax", no_argument, NULL, OPTION_RELAX},
|
||
{NULL, no_argument, NULL, 0}
|
||
};
|
||
|
||
size_t md_longopts_size = sizeof (md_longopts);
|
||
|
||
int
|
||
md_parse_option (int c, const char *arg)
|
||
{
|
||
switch (c)
|
||
{
|
||
case 'z':
|
||
if (!strcmp (arg, "8001"))
|
||
z8k_target_from_cmdline = 2;
|
||
else if (!strcmp (arg, "8002"))
|
||
z8k_target_from_cmdline = 1;
|
||
else
|
||
{
|
||
as_bad (_("invalid architecture -z%s"), arg);
|
||
return 0;
|
||
}
|
||
break;
|
||
|
||
case OPTION_RELAX:
|
||
linkrelax = 1;
|
||
break;
|
||
|
||
default:
|
||
return 0;
|
||
}
|
||
|
||
return 1;
|
||
}
|
||
|
||
void
|
||
md_show_usage (FILE *stream)
|
||
{
|
||
fprintf (stream, _("\
|
||
Z8K options:\n\
|
||
-z8001 generate segmented code\n\
|
||
-z8002 generate unsegmented code\n\
|
||
-linkrelax create linker relaxable code\n"));
|
||
}
|
||
|
||
void
|
||
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
|
||
segT sec ATTRIBUTE_UNUSED,
|
||
fragS *fragP ATTRIBUTE_UNUSED)
|
||
{
|
||
printf (_("call to md_convert_frag\n"));
|
||
abort ();
|
||
}
|
||
|
||
/* Generate a machine dependent reloc from a fixup. */
|
||
|
||
arelent*
|
||
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED,
|
||
fixS *fixp ATTRIBUTE_UNUSED)
|
||
{
|
||
arelent *reloc;
|
||
|
||
reloc = XNEW (arelent);
|
||
reloc->sym_ptr_ptr = XNEW (asymbol *);
|
||
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
||
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
||
reloc->addend = fixp->fx_offset;
|
||
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
|
||
|
||
if (! reloc->howto)
|
||
{
|
||
as_bad_where (fixp->fx_file, fixp->fx_line,
|
||
_("Cannot represent %s relocation in object file"),
|
||
bfd_get_reloc_code_name (fixp->fx_r_type));
|
||
abort ();
|
||
}
|
||
return reloc;
|
||
}
|
||
|
||
valueT
|
||
md_section_align (segT seg, valueT size)
|
||
{
|
||
int align = bfd_get_section_alignment (stdoutput, seg);
|
||
valueT mask = ((valueT) 1 << align) - 1;
|
||
|
||
return (size + mask) & ~mask;
|
||
}
|
||
|
||
/* Attempt to simplify or eliminate a fixup. To indicate that a fixup
|
||
has been eliminated, set fix->fx_done. If fix->fx_addsy is non-NULL,
|
||
we will have to generate a reloc entry. */
|
||
void
|
||
md_apply_fix (fixS *fixP, valueT *valP, segT segment ATTRIBUTE_UNUSED)
|
||
{
|
||
long val = * (long *) valP;
|
||
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
|
||
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_Z8K_IMM4L:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
buf[0] = (buf[0] & 0xf0) | (val & 0xf);
|
||
break;
|
||
|
||
case BFD_RELOC_8:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
*buf++ = val;
|
||
break;
|
||
|
||
case BFD_RELOC_16:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
*buf++ = (val >> 8);
|
||
*buf++ = val;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_32:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
*buf++ = (val >> 24);
|
||
*buf++ = (val >> 16);
|
||
*buf++ = (val >> 8);
|
||
*buf++ = val;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_8_PCREL:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
if (val & 1)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("cannot branch to odd address"));
|
||
val /= 2;
|
||
if (val > 127 || val < -128)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("relative jump out of range"));
|
||
*buf++ = val;
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 1;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_16_PCREL:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
val = val - fixP->fx_frag->fr_address + fixP->fx_where - fixP->fx_size;
|
||
if (val > 32767 || val < -32768)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("relative address out of range"));
|
||
*buf++ = (val >> 8);
|
||
*buf++ = val;
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 1;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_Z8K_CALLR:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
if (val & 1)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("cannot branch to odd address"));
|
||
if (val > 4096 || val < -4095)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("relative call out of range"));
|
||
val = -val / 2;
|
||
*buf = (*buf & 0xf0) | ((val >> 8) & 0xf);
|
||
buf++;
|
||
*buf++ = val & 0xff;
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 1;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_Z8K_DISP7:
|
||
if (fixP->fx_addsy)
|
||
{
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 0;
|
||
}
|
||
else
|
||
{
|
||
if (val & 1)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("cannot branch to odd address"));
|
||
val /= 2;
|
||
if (val > 0 || val < -127)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("relative jump out of range"));
|
||
*buf = (*buf & 0x80) | (-val & 0x7f);
|
||
fixP->fx_no_overflow = 1;
|
||
fixP->fx_done = 1;
|
||
}
|
||
break;
|
||
|
||
default:
|
||
printf(_("md_apply_fix: unknown r_type 0x%x\n"), fixP->fx_r_type);
|
||
abort ();
|
||
}
|
||
|
||
if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
|
||
fixP->fx_done = 1;
|
||
}
|
||
|
||
int
|
||
md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
|
||
segT segment_type ATTRIBUTE_UNUSED)
|
||
{
|
||
printf (_("call to md_estimate_size_before_relax\n"));
|
||
abort ();
|
||
}
|
||
|
||
/* Put number into target byte order. */
|
||
|
||
void
|
||
md_number_to_chars (char *ptr, valueT use, int nbytes)
|
||
{
|
||
number_to_chars_bigendian (ptr, use, nbytes);
|
||
}
|
||
|
||
/* On the Z8000, a PC-relative offset is relative to the address of the
|
||
instruction plus its size. */
|
||
long
|
||
md_pcrel_from (fixS *fixP)
|
||
{
|
||
return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
|
||
}
|
||
|
||
void
|
||
tc_coff_symbol_emit_hook (symbolS *s ATTRIBUTE_UNUSED)
|
||
{
|
||
}
|