35c081572f
BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
190 lines
5 KiB
C
190 lines
5 KiB
C
/* NDS32-specific support for 32-bit ELF.
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Copyright (C) 2012-2013 Free Software Foundation, Inc.
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Contributed by Andes Technology Corporation.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA.*/
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#ifndef NDS32_ASM_H
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#define NDS32_ASM_H
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/* Constant values for assembler. */
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enum
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{
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/* Error code for assembling an instruction. */
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NASM_OK = 0,
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NASM_ERR_UNKNOWN_OP,
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NASM_ERR_SYNTAX,
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NASM_ERR_OPERAND,
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NASM_ERR_OUT_OF_RANGE,
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NASM_ERR_REG_REDUCED,
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NASM_ERR_JUNK_EOL,
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/* Results of parse_operand. */
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NASM_R_CONST,
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NASM_R_SYMBOL,
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NASM_R_ILLEGAL,
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/* Flags for open description. */
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NASM_OPEN_ARCH_V1 = 0x0,
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NASM_OPEN_ARCH_V2 = 0x1,
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NASM_OPEN_ARCH_V3 = 0x2,
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NASM_OPEN_ARCH_V3M = 0x3,
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NASM_OPEN_ARCH_MASK = 0xf,
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NASM_OPEN_REDUCED_REG = 0x10,
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/* Common attributes. */
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NASM_ATTR_ISA_V1 = 0x01,
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NASM_ATTR_ISA_V2 = 0x02,
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NASM_ATTR_ISA_V3 = 0x04,
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NASM_ATTR_ISA_V3M = 0x08,
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NASM_ATTR_ISA_ALL = 0x0f,
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/* Attributes for instructions. */
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NASM_ATTR_MAC = 0x0000100,
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NASM_ATTR_DIV = 0x0000200,
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NASM_ATTR_FPU = 0x0000400,
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NASM_ATTR_FPU_SP_EXT = 0x0000800,
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NASM_ATTR_FPU_DP_EXT = 0x0001000,
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NASM_ATTR_STR_EXT = 0x0002000,
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NASM_ATTR_PERF_EXT = 0x0004000,
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NASM_ATTR_PERF2_EXT = 0x0008000,
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NASM_ATTR_AUDIO_ISAEXT = 0x0010000,
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NASM_ATTR_IFC_EXT = 0x0020000,
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NASM_ATTR_EX9_EXT = 0x0040000,
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NASM_ATTR_FPU_FMA = 0x0080000,
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NASM_ATTR_DXREG = 0x0100000,
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NASM_ATTR_BRANCH = 0x0200000,
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NASM_ATTR_RELAXABLE = 0x0400000,
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NASM_ATTR_PCREL = 0x0800000,
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NASM_ATTR_GPREL = 0x1000000,
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/* Attributes for relocations. */
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NASM_ATTR_HI20 = 0x10000000,
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NASM_ATTR_LO12 = 0x20000000,
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NASM_ATTR_LO20 = 0x40000000,
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/* Attributes for registers. */
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NASM_ATTR_RDREG = 0x000100
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};
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/* Macro for instruction attribute. */
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#define ATTR(attr) NASM_ATTR_ ## attr
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#define ATTR_NONE 0
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#define ATTR_PCREL (ATTR (PCREL) | ATTR (BRANCH))
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#define ATTR_ALL (ATTR (ISA_ALL))
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#define ATTR_V2UP (ATTR_ALL & ~(ATTR (ISA_V1)))
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#define ATTR_V3MUP (ATTR (ISA_V3) | ATTR (ISA_V3M))
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#define ATTR_V3 (ATTR (ISA_V3))
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#define ATTR_V3MEX_V1 (ATTR_ALL & ~(ATTR (ISA_V3M)))
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#define ATTR_V3MEX_V2 (ATTR_V2UP & ~(ATTR (ISA_V3M)))
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/* Lexical element in parsed syntax. */
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typedef int lex_t;
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/* Common header for hash entries. */
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struct nds32_hash_entry
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{
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const char *name;
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};
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typedef struct nds32_keyword
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{
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const char *name;
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int value;
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uint64_t attr;
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} keyword_t;
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typedef struct nds32_opcode
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{
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/* Opcode for the instruction. */
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const char *opcode;
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/* Human readable string of this instruction. */
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const char *instruction;
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/* Base value of this instruction. */
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uint32_t value;
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/* The byte-size of the instruction. */
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int isize;
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/* Attributes of this instruction. */
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uint64_t attr;
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/* Implicit define/use. */
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uint64_t defuse;
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/* Parsed string for assembling. */
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lex_t *syntax;
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/* Number of variant. */
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int variant;
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/* Next form of the same mnemonic. */
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struct nds32_opcode *next;
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/* TODO: Extra constrains and verification.
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For example, `mov55 $sp, $sp' is not allowed in v3. */
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} opcode_t;
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typedef struct nds32_asm_insn
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{
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/* Assembled instruction bytes. */
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uint32_t insn;
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/* The opcode structure for this instruction. */
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struct nds32_opcode *opcode;
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/* The field need special fix-up, used for relocation. */
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const struct nds32_field *field;
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/* Attributes for relocation. */
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uint64_t attr;
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/* Application-dependent data, e.g., expression. */
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void *info;
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/* Input/output registers. */
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uint64_t defuse;
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} nds32_asm_insn_t;
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typedef struct nds32_asm_desc
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{
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/* The callback provided by assembler user for parse an operand,
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e.g., parse integer. */
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int (*parse_operand) (struct nds32_asm_desc *,
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struct nds32_asm_insn *,
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char **, int64_t *);
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/* Result of assembling. */
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int result;
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/* The mach for this assembling. */
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int mach;
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int flags;
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} nds32_asm_desc_t;
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/* The field information for an operand. */
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typedef struct nds32_field
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{
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/* Name of the field. */
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const char *name;
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int bitpos;
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int bitsize;
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int shift;
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int hw_res;
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int (*parse) (struct nds32_asm_desc *,
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struct nds32_asm_insn *,
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char **, int64_t *);
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} field_t;
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extern void nds32_assemble (nds32_asm_desc_t *, nds32_asm_insn_t *, char *);
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extern void nds32_asm_init (nds32_asm_desc_t *, int);
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#endif
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