802e8e6d84
This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
937 lines
24 KiB
C
937 lines
24 KiB
C
/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
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Copyright (C) 1995-2014 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
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On Bionic elf.h and linux/elf.h have conflicting definitions. */
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#ifndef ELFMAG0
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#include <elf.h>
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#endif
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#include <sys/ptrace.h>
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#include <signal.h>
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/* Defined in auto-generated files. */
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void init_registers_arm (void);
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extern const struct target_desc *tdesc_arm;
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void init_registers_arm_with_iwmmxt (void);
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extern const struct target_desc *tdesc_arm_with_iwmmxt;
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void init_registers_arm_with_vfpv2 (void);
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extern const struct target_desc *tdesc_arm_with_vfpv2;
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void init_registers_arm_with_vfpv3 (void);
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extern const struct target_desc *tdesc_arm_with_vfpv3;
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void init_registers_arm_with_neon (void);
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extern const struct target_desc *tdesc_arm_with_neon;
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#ifndef PTRACE_GET_THREAD_AREA
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#define PTRACE_GET_THREAD_AREA 22
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#endif
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#ifndef PTRACE_GETWMMXREGS
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# define PTRACE_GETWMMXREGS 18
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# define PTRACE_SETWMMXREGS 19
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#endif
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#ifndef PTRACE_GETVFPREGS
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# define PTRACE_GETVFPREGS 27
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# define PTRACE_SETVFPREGS 28
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#endif
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#ifndef PTRACE_GETHBPREGS
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#define PTRACE_GETHBPREGS 29
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#define PTRACE_SETHBPREGS 30
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#endif
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/* Information describing the hardware breakpoint capabilities. */
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static struct
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{
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unsigned char arch;
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unsigned char max_wp_length;
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unsigned char wp_count;
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unsigned char bp_count;
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} arm_linux_hwbp_cap;
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/* Enum describing the different types of ARM hardware break-/watch-points. */
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typedef enum
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{
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arm_hwbp_break = 0,
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arm_hwbp_load = 1,
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arm_hwbp_store = 2,
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arm_hwbp_access = 3
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} arm_hwbp_type;
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/* Type describing an ARM Hardware Breakpoint Control register value. */
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typedef unsigned int arm_hwbp_control_t;
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/* Structure used to keep track of hardware break-/watch-points. */
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struct arm_linux_hw_breakpoint
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{
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/* Address to break on, or being watched. */
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unsigned int address;
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/* Control register for break-/watch- point. */
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arm_hwbp_control_t control;
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};
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/* Since we cannot dynamically allocate subfields of arch_process_info,
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assume a maximum number of supported break-/watchpoints. */
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#define MAX_BPTS 32
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#define MAX_WPTS 32
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/* Per-process arch-specific data we want to keep. */
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struct arch_process_info
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{
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/* Hardware breakpoints for this process. */
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struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
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/* Hardware watchpoints for this process. */
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struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
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};
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/* Per-thread arch-specific data we want to keep. */
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struct arch_lwp_info
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{
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/* Non-zero if our copy differs from what's recorded in the thread. */
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char bpts_changed[MAX_BPTS];
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char wpts_changed[MAX_WPTS];
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/* Cached stopped data address. */
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CORE_ADDR stopped_data_address;
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};
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static unsigned long arm_hwcap;
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/* These are in <asm/elf.h> in current kernels. */
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#define HWCAP_VFP 64
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#define HWCAP_IWMMXT 512
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#define HWCAP_NEON 4096
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#define HWCAP_VFPv3 8192
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#define HWCAP_VFPv3D16 16384
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#define arm_num_regs 26
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static int arm_regmap[] = {
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0, 4, 8, 12, 16, 20, 24, 28,
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32, 36, 40, 44, 48, 52, 56, 60,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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64
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};
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static int
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arm_cannot_store_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static int
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arm_cannot_fetch_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static void
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arm_fill_gregset (struct regcache *regcache, void *buf)
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{
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int i;
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for (i = 0; i < arm_num_regs; i++)
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if (arm_regmap[i] != -1)
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collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
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}
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static void
|
|
arm_store_gregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i;
|
|
char zerobuf[8];
|
|
|
|
memset (zerobuf, 0, 8);
|
|
for (i = 0; i < arm_num_regs; i++)
|
|
if (arm_regmap[i] != -1)
|
|
supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
|
|
else
|
|
supply_register (regcache, i, zerobuf);
|
|
}
|
|
|
|
static void
|
|
arm_fill_wmmxregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i;
|
|
|
|
if (!(arm_hwcap & HWCAP_IWMMXT))
|
|
return;
|
|
|
|
for (i = 0; i < 16; i++)
|
|
collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
|
|
|
|
/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
|
|
for (i = 0; i < 6; i++)
|
|
collect_register (regcache, arm_num_regs + i + 16,
|
|
(char *) buf + 16 * 8 + i * 4);
|
|
}
|
|
|
|
static void
|
|
arm_store_wmmxregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i;
|
|
|
|
if (!(arm_hwcap & HWCAP_IWMMXT))
|
|
return;
|
|
|
|
for (i = 0; i < 16; i++)
|
|
supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
|
|
|
|
/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
|
|
for (i = 0; i < 6; i++)
|
|
supply_register (regcache, arm_num_regs + i + 16,
|
|
(char *) buf + 16 * 8 + i * 4);
|
|
}
|
|
|
|
static void
|
|
arm_fill_vfpregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i, num, base;
|
|
|
|
if (!(arm_hwcap & HWCAP_VFP))
|
|
return;
|
|
|
|
if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
|
|
num = 32;
|
|
else
|
|
num = 16;
|
|
|
|
base = find_regno (regcache->tdesc, "d0");
|
|
for (i = 0; i < num; i++)
|
|
collect_register (regcache, base + i, (char *) buf + i * 8);
|
|
|
|
collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
|
|
}
|
|
|
|
static void
|
|
arm_store_vfpregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i, num, base;
|
|
|
|
if (!(arm_hwcap & HWCAP_VFP))
|
|
return;
|
|
|
|
if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
|
|
num = 32;
|
|
else
|
|
num = 16;
|
|
|
|
base = find_regno (regcache->tdesc, "d0");
|
|
for (i = 0; i < num; i++)
|
|
supply_register (regcache, base + i, (char *) buf + i * 8);
|
|
|
|
supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
|
|
}
|
|
|
|
extern int debug_threads;
|
|
|
|
static CORE_ADDR
|
|
arm_get_pc (struct regcache *regcache)
|
|
{
|
|
unsigned long pc;
|
|
collect_register_by_name (regcache, "pc", &pc);
|
|
if (debug_threads)
|
|
debug_printf ("stop pc is %08lx\n", pc);
|
|
return pc;
|
|
}
|
|
|
|
static void
|
|
arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
|
|
{
|
|
unsigned long newpc = pc;
|
|
supply_register_by_name (regcache, "pc", &newpc);
|
|
}
|
|
|
|
/* Correct in either endianness. */
|
|
static const unsigned long arm_breakpoint = 0xef9f0001;
|
|
#define arm_breakpoint_len 4
|
|
static const unsigned short thumb_breakpoint = 0xde01;
|
|
static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
|
|
|
|
/* For new EABI binaries. We recognize it regardless of which ABI
|
|
is used for gdbserver, so single threaded debugging should work
|
|
OK, but for multi-threaded debugging we only insert the current
|
|
ABI's breakpoint instruction. For now at least. */
|
|
static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
|
|
|
|
static int
|
|
arm_breakpoint_at (CORE_ADDR where)
|
|
{
|
|
struct regcache *regcache = get_thread_regcache (current_inferior, 1);
|
|
unsigned long cpsr;
|
|
|
|
collect_register_by_name (regcache, "cpsr", &cpsr);
|
|
|
|
if (cpsr & 0x20)
|
|
{
|
|
/* Thumb mode. */
|
|
unsigned short insn;
|
|
|
|
(*the_target->read_memory) (where, (unsigned char *) &insn, 2);
|
|
if (insn == thumb_breakpoint)
|
|
return 1;
|
|
|
|
if (insn == thumb2_breakpoint[0])
|
|
{
|
|
(*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
|
|
if (insn == thumb2_breakpoint[1])
|
|
return 1;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* ARM mode. */
|
|
unsigned long insn;
|
|
|
|
(*the_target->read_memory) (where, (unsigned char *) &insn, 4);
|
|
if (insn == arm_breakpoint)
|
|
return 1;
|
|
|
|
if (insn == arm_eabi_breakpoint)
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* We only place breakpoints in empty marker functions, and thread locking
|
|
is outside of the function. So rather than importing software single-step,
|
|
we can just run until exit. */
|
|
static CORE_ADDR
|
|
arm_reinsert_addr (void)
|
|
{
|
|
struct regcache *regcache = get_thread_regcache (current_inferior, 1);
|
|
unsigned long pc;
|
|
collect_register_by_name (regcache, "lr", &pc);
|
|
return pc;
|
|
}
|
|
|
|
/* Fetch the thread-local storage pointer for libthread_db. */
|
|
|
|
ps_err_e
|
|
ps_get_thread_area (const struct ps_prochandle *ph,
|
|
lwpid_t lwpid, int idx, void **base)
|
|
{
|
|
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
|
|
return PS_ERR;
|
|
|
|
/* IDX is the bias from the thread pointer to the beginning of the
|
|
thread descriptor. It has to be subtracted due to implementation
|
|
quirks in libthread_db. */
|
|
*base = (void *) ((char *)*base - idx);
|
|
|
|
return PS_OK;
|
|
}
|
|
|
|
|
|
/* Query Hardware Breakpoint information for the target we are attached to
|
|
(using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
|
|
static void
|
|
arm_linux_init_hwbp_cap (int pid)
|
|
{
|
|
unsigned int val;
|
|
|
|
if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
|
|
return;
|
|
|
|
arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
|
|
if (arm_linux_hwbp_cap.arch == 0)
|
|
return;
|
|
|
|
arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
|
|
arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
|
|
arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
|
|
|
|
if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
|
|
internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
|
|
if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
|
|
internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
|
|
}
|
|
|
|
/* How many hardware breakpoints are available? */
|
|
static int
|
|
arm_linux_get_hw_breakpoint_count (void)
|
|
{
|
|
return arm_linux_hwbp_cap.bp_count;
|
|
}
|
|
|
|
/* How many hardware watchpoints are available? */
|
|
static int
|
|
arm_linux_get_hw_watchpoint_count (void)
|
|
{
|
|
return arm_linux_hwbp_cap.wp_count;
|
|
}
|
|
|
|
/* Maximum length of area watched by hardware watchpoint. */
|
|
static int
|
|
arm_linux_get_hw_watchpoint_max_length (void)
|
|
{
|
|
return arm_linux_hwbp_cap.max_wp_length;
|
|
}
|
|
|
|
/* Initialize an ARM hardware break-/watch-point control register value.
|
|
BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
|
|
type of break-/watch-point; ENABLE indicates whether the point is enabled.
|
|
*/
|
|
static arm_hwbp_control_t
|
|
arm_hwbp_control_initialize (unsigned byte_address_select,
|
|
arm_hwbp_type hwbp_type,
|
|
int enable)
|
|
{
|
|
gdb_assert ((byte_address_select & ~0xffU) == 0);
|
|
gdb_assert (hwbp_type != arm_hwbp_break
|
|
|| ((byte_address_select & 0xfU) != 0));
|
|
|
|
return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
|
|
}
|
|
|
|
/* Does the breakpoint control value CONTROL have the enable bit set? */
|
|
static int
|
|
arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
|
|
{
|
|
return control & 0x1;
|
|
}
|
|
|
|
/* Is the breakpoint control value CONTROL initialized? */
|
|
static int
|
|
arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
|
|
{
|
|
return control != 0;
|
|
}
|
|
|
|
/* Change a breakpoint control word so that it is in the disabled state. */
|
|
static arm_hwbp_control_t
|
|
arm_hwbp_control_disable (arm_hwbp_control_t control)
|
|
{
|
|
return control & ~0x1;
|
|
}
|
|
|
|
/* Are two break-/watch-points equal? */
|
|
static int
|
|
arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
|
|
const struct arm_linux_hw_breakpoint *p2)
|
|
{
|
|
return p1->address == p2->address && p1->control == p2->control;
|
|
}
|
|
|
|
/* Convert a raw breakpoint type to an enum arm_hwbp_type. */
|
|
|
|
static int
|
|
raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
|
|
{
|
|
switch (raw_type)
|
|
{
|
|
case raw_bkpt_type_hw:
|
|
return arm_hwbp_break;
|
|
case raw_bkpt_type_write_wp:
|
|
return arm_hwbp_store;
|
|
case raw_bkpt_type_read_wp:
|
|
return arm_hwbp_load;
|
|
case raw_bkpt_type_access_wp:
|
|
return arm_hwbp_access;
|
|
default:
|
|
gdb_assert_not_reached ("unhandled raw type");
|
|
}
|
|
}
|
|
|
|
/* Initialize the hardware breakpoint structure P for a breakpoint or
|
|
watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
|
|
Returns -1 if TYPE is unsupported, or -2 if the particular combination
|
|
of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
|
|
represents a breakpoint and 1 if type represents a watchpoint. */
|
|
static int
|
|
arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
|
|
int len, struct arm_linux_hw_breakpoint *p)
|
|
{
|
|
arm_hwbp_type hwbp_type;
|
|
unsigned mask;
|
|
|
|
hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
|
|
|
|
if (hwbp_type == arm_hwbp_break)
|
|
{
|
|
/* For breakpoints, the length field encodes the mode. */
|
|
switch (len)
|
|
{
|
|
case 2: /* 16-bit Thumb mode breakpoint */
|
|
case 3: /* 32-bit Thumb mode breakpoint */
|
|
mask = 0x3;
|
|
addr &= ~1;
|
|
break;
|
|
case 4: /* 32-bit ARM mode breakpoint */
|
|
mask = 0xf;
|
|
addr &= ~3;
|
|
break;
|
|
default:
|
|
/* Unsupported. */
|
|
return -2;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
|
|
CORE_ADDR aligned_addr;
|
|
|
|
/* Can not set watchpoints for zero or negative lengths. */
|
|
if (len <= 0)
|
|
return -2;
|
|
/* The current ptrace interface can only handle watchpoints that are a
|
|
power of 2. */
|
|
if ((len & (len - 1)) != 0)
|
|
return -2;
|
|
|
|
/* Test that the range [ADDR, ADDR + LEN) fits into the largest address
|
|
range covered by a watchpoint. */
|
|
aligned_addr = addr & ~(max_wp_length - 1);
|
|
if (aligned_addr + max_wp_length < addr + len)
|
|
return -2;
|
|
|
|
mask = (1 << len) - 1;
|
|
}
|
|
|
|
p->address = (unsigned int) addr;
|
|
p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
|
|
|
|
return hwbp_type != arm_hwbp_break;
|
|
}
|
|
|
|
/* Callback to mark a watch-/breakpoint to be updated in all threads of
|
|
the current process. */
|
|
|
|
struct update_registers_data
|
|
{
|
|
int watch;
|
|
int i;
|
|
};
|
|
|
|
static int
|
|
update_registers_callback (struct inferior_list_entry *entry, void *arg)
|
|
{
|
|
struct thread_info *thread = (struct thread_info *) entry;
|
|
struct lwp_info *lwp = get_thread_lwp (thread);
|
|
struct update_registers_data *data = (struct update_registers_data *) arg;
|
|
|
|
/* Only update the threads of the current process. */
|
|
if (pid_of (thread) == pid_of (current_inferior))
|
|
{
|
|
/* The actual update is done later just before resuming the lwp,
|
|
we just mark that the registers need updating. */
|
|
if (data->watch)
|
|
lwp->arch_private->wpts_changed[data->i] = 1;
|
|
else
|
|
lwp->arch_private->bpts_changed[data->i] = 1;
|
|
|
|
/* If the lwp isn't stopped, force it to momentarily pause, so
|
|
we can update its breakpoint registers. */
|
|
if (!lwp->stopped)
|
|
linux_stop_lwp (lwp);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
arm_supports_z_point_type (char z_type)
|
|
{
|
|
switch (z_type)
|
|
{
|
|
case Z_PACKET_HW_BP:
|
|
case Z_PACKET_WRITE_WP:
|
|
case Z_PACKET_READ_WP:
|
|
case Z_PACKET_ACCESS_WP:
|
|
return 1;
|
|
default:
|
|
/* Leave the handling of sw breakpoints with the gdb client. */
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/* Insert hardware break-/watchpoint. */
|
|
static int
|
|
arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
|
|
int len, struct raw_breakpoint *bp)
|
|
{
|
|
struct process_info *proc = current_process ();
|
|
struct arm_linux_hw_breakpoint p, *pts;
|
|
int watch, i, count;
|
|
|
|
watch = arm_linux_hw_point_initialize (type, addr, len, &p);
|
|
if (watch < 0)
|
|
{
|
|
/* Unsupported. */
|
|
return watch == -1 ? 1 : -1;
|
|
}
|
|
|
|
if (watch)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
pts = proc->private->arch_private->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
pts = proc->private->arch_private->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
if (!arm_hwbp_control_is_enabled (pts[i].control))
|
|
{
|
|
struct update_registers_data data = { watch, i };
|
|
pts[i] = p;
|
|
find_inferior (&all_threads, update_registers_callback, &data);
|
|
return 0;
|
|
}
|
|
|
|
/* We're out of watchpoints. */
|
|
return -1;
|
|
}
|
|
|
|
/* Remove hardware break-/watchpoint. */
|
|
static int
|
|
arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
|
|
int len, struct raw_breakpoint *bp)
|
|
{
|
|
struct process_info *proc = current_process ();
|
|
struct arm_linux_hw_breakpoint p, *pts;
|
|
int watch, i, count;
|
|
|
|
watch = arm_linux_hw_point_initialize (type, addr, len, &p);
|
|
if (watch < 0)
|
|
{
|
|
/* Unsupported. */
|
|
return -1;
|
|
}
|
|
|
|
if (watch)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
pts = proc->private->arch_private->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
pts = proc->private->arch_private->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
if (arm_linux_hw_breakpoint_equal (&p, pts + i))
|
|
{
|
|
struct update_registers_data data = { watch, i };
|
|
pts[i].control = arm_hwbp_control_disable (pts[i].control);
|
|
find_inferior (&all_threads, update_registers_callback, &data);
|
|
return 0;
|
|
}
|
|
|
|
/* No watchpoint matched. */
|
|
return -1;
|
|
}
|
|
|
|
/* Return whether current thread is stopped due to a watchpoint. */
|
|
static int
|
|
arm_stopped_by_watchpoint (void)
|
|
{
|
|
struct lwp_info *lwp = get_thread_lwp (current_inferior);
|
|
siginfo_t siginfo;
|
|
|
|
/* We must be able to set hardware watchpoints. */
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
return 0;
|
|
|
|
/* Retrieve siginfo. */
|
|
errno = 0;
|
|
ptrace (PTRACE_GETSIGINFO, lwpid_of (current_inferior), 0, &siginfo);
|
|
if (errno != 0)
|
|
return 0;
|
|
|
|
/* This must be a hardware breakpoint. */
|
|
if (siginfo.si_signo != SIGTRAP
|
|
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
|
|
return 0;
|
|
|
|
/* If we are in a positive slot then we're looking at a breakpoint and not
|
|
a watchpoint. */
|
|
if (siginfo.si_errno >= 0)
|
|
return 0;
|
|
|
|
/* Cache stopped data address for use by arm_stopped_data_address. */
|
|
lwp->arch_private->stopped_data_address
|
|
= (CORE_ADDR) (uintptr_t) siginfo.si_addr;
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Return data address that triggered watchpoint. Called only if
|
|
arm_stopped_by_watchpoint returned true. */
|
|
static CORE_ADDR
|
|
arm_stopped_data_address (void)
|
|
{
|
|
struct lwp_info *lwp = get_thread_lwp (current_inferior);
|
|
return lwp->arch_private->stopped_data_address;
|
|
}
|
|
|
|
/* Called when a new process is created. */
|
|
static struct arch_process_info *
|
|
arm_new_process (void)
|
|
{
|
|
struct arch_process_info *info = xcalloc (1, sizeof (*info));
|
|
return info;
|
|
}
|
|
|
|
/* Called when a new thread is detected. */
|
|
static struct arch_lwp_info *
|
|
arm_new_thread (void)
|
|
{
|
|
struct arch_lwp_info *info = xcalloc (1, sizeof (*info));
|
|
int i;
|
|
|
|
for (i = 0; i < MAX_BPTS; i++)
|
|
info->bpts_changed[i] = 1;
|
|
for (i = 0; i < MAX_WPTS; i++)
|
|
info->wpts_changed[i] = 1;
|
|
|
|
return info;
|
|
}
|
|
|
|
/* Called when resuming a thread.
|
|
If the debug regs have changed, update the thread's copies. */
|
|
static void
|
|
arm_prepare_to_resume (struct lwp_info *lwp)
|
|
{
|
|
struct thread_info *thread = get_lwp_thread (lwp);
|
|
int pid = lwpid_of (thread);
|
|
struct process_info *proc = find_process_pid (pid_of (thread));
|
|
struct arch_process_info *proc_info = proc->private->arch_private;
|
|
struct arch_lwp_info *lwp_info = lwp->arch_private;
|
|
int i;
|
|
|
|
for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
|
|
if (lwp_info->bpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
|
|
if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 1),
|
|
&proc_info->bpts[i].address) < 0)
|
|
perror_with_name ("Unexpected error setting breakpoint address");
|
|
|
|
if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 2),
|
|
&proc_info->bpts[i].control) < 0)
|
|
perror_with_name ("Unexpected error setting breakpoint");
|
|
|
|
lwp_info->bpts_changed[i] = 0;
|
|
}
|
|
|
|
for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
|
|
if (lwp_info->wpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
|
|
if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 1),
|
|
&proc_info->wpts[i].address) < 0)
|
|
perror_with_name ("Unexpected error setting watchpoint address");
|
|
|
|
if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 2),
|
|
&proc_info->wpts[i].control) < 0)
|
|
perror_with_name ("Unexpected error setting watchpoint");
|
|
|
|
lwp_info->wpts_changed[i] = 0;
|
|
}
|
|
}
|
|
|
|
|
|
static int
|
|
arm_get_hwcap (unsigned long *valp)
|
|
{
|
|
unsigned char *data = alloca (8);
|
|
int offset = 0;
|
|
|
|
while ((*the_target->read_auxv) (offset, data, 8) == 8)
|
|
{
|
|
unsigned int *data_p = (unsigned int *)data;
|
|
if (data_p[0] == AT_HWCAP)
|
|
{
|
|
*valp = data_p[1];
|
|
return 1;
|
|
}
|
|
|
|
offset += 8;
|
|
}
|
|
|
|
*valp = 0;
|
|
return 0;
|
|
}
|
|
|
|
static const struct target_desc *
|
|
arm_read_description (void)
|
|
{
|
|
int pid = lwpid_of (current_inferior);
|
|
|
|
/* Query hardware watchpoint/breakpoint capabilities. */
|
|
arm_linux_init_hwbp_cap (pid);
|
|
|
|
arm_hwcap = 0;
|
|
if (arm_get_hwcap (&arm_hwcap) == 0)
|
|
return tdesc_arm;
|
|
|
|
if (arm_hwcap & HWCAP_IWMMXT)
|
|
return tdesc_arm_with_iwmmxt;
|
|
|
|
if (arm_hwcap & HWCAP_VFP)
|
|
{
|
|
const struct target_desc *result;
|
|
char *buf;
|
|
|
|
/* NEON implies either no VFP, or VFPv3-D32. We only support
|
|
it with VFP. */
|
|
if (arm_hwcap & HWCAP_NEON)
|
|
result = tdesc_arm_with_neon;
|
|
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
|
|
result = tdesc_arm_with_vfpv3;
|
|
else
|
|
result = tdesc_arm_with_vfpv2;
|
|
|
|
/* Now make sure that the kernel supports reading these
|
|
registers. Support was added in 2.6.30. */
|
|
errno = 0;
|
|
buf = xmalloc (32 * 8 + 4);
|
|
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
|
|
&& errno == EIO)
|
|
{
|
|
arm_hwcap = 0;
|
|
result = tdesc_arm;
|
|
}
|
|
free (buf);
|
|
|
|
return result;
|
|
}
|
|
|
|
/* The default configuration uses legacy FPA registers, probably
|
|
simulated. */
|
|
return tdesc_arm;
|
|
}
|
|
|
|
static void
|
|
arm_arch_setup (void)
|
|
{
|
|
current_process ()->tdesc = arm_read_description ();
|
|
}
|
|
|
|
static struct regset_info arm_regsets[] = {
|
|
{ PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4,
|
|
GENERAL_REGS,
|
|
arm_fill_gregset, arm_store_gregset },
|
|
{ PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4,
|
|
EXTENDED_REGS,
|
|
arm_fill_wmmxregset, arm_store_wmmxregset },
|
|
{ PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4,
|
|
EXTENDED_REGS,
|
|
arm_fill_vfpregset, arm_store_vfpregset },
|
|
{ 0, 0, 0, -1, -1, NULL, NULL }
|
|
};
|
|
|
|
static struct regsets_info arm_regsets_info =
|
|
{
|
|
arm_regsets, /* regsets */
|
|
0, /* num_regsets */
|
|
NULL, /* disabled_regsets */
|
|
};
|
|
|
|
static struct usrregs_info arm_usrregs_info =
|
|
{
|
|
arm_num_regs,
|
|
arm_regmap,
|
|
};
|
|
|
|
static struct regs_info regs_info =
|
|
{
|
|
NULL, /* regset_bitmap */
|
|
&arm_usrregs_info,
|
|
&arm_regsets_info
|
|
};
|
|
|
|
static const struct regs_info *
|
|
arm_regs_info (void)
|
|
{
|
|
return ®s_info;
|
|
}
|
|
|
|
struct linux_target_ops the_low_target = {
|
|
arm_arch_setup,
|
|
arm_regs_info,
|
|
arm_cannot_fetch_register,
|
|
arm_cannot_store_register,
|
|
NULL, /* fetch_register */
|
|
arm_get_pc,
|
|
arm_set_pc,
|
|
|
|
/* Define an ARM-mode breakpoint; we only set breakpoints in the C
|
|
library, which is most likely to be ARM. If the kernel supports
|
|
clone events, we will never insert a breakpoint, so even a Thumb
|
|
C library will work; so will mixing EABI/non-EABI gdbserver and
|
|
application. */
|
|
#ifndef __ARM_EABI__
|
|
(const unsigned char *) &arm_breakpoint,
|
|
#else
|
|
(const unsigned char *) &arm_eabi_breakpoint,
|
|
#endif
|
|
arm_breakpoint_len,
|
|
arm_reinsert_addr,
|
|
0,
|
|
arm_breakpoint_at,
|
|
arm_supports_z_point_type,
|
|
arm_insert_point,
|
|
arm_remove_point,
|
|
arm_stopped_by_watchpoint,
|
|
arm_stopped_data_address,
|
|
NULL, /* collect_ptrace_register */
|
|
NULL, /* supply_ptrace_register */
|
|
NULL, /* siginfo_fixup */
|
|
arm_new_process,
|
|
arm_new_thread,
|
|
arm_prepare_to_resume,
|
|
};
|
|
|
|
void
|
|
initialize_low_arch (void)
|
|
{
|
|
/* Initialize the Linux target descriptions. */
|
|
init_registers_arm ();
|
|
init_registers_arm_with_iwmmxt ();
|
|
init_registers_arm_with_vfpv2 ();
|
|
init_registers_arm_with_vfpv3 ();
|
|
init_registers_arm_with_neon ();
|
|
|
|
initialize_regsets_info (&arm_regsets_info);
|
|
}
|