631 lines
18 KiB
Scheme
631 lines
18 KiB
Scheme
; IQ2000-only CPU description. -*- Scheme -*-
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;
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; Copyright 2000, 2001, 2002, 2004, 2007 Free Software Foundation, Inc.
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;
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; Contributed by Red Hat Inc; developed under contract from Vitesse.
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;
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; This file is part of the GNU Binutils.
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;
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation; either version 3 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, write to the Free Software
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; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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; MA 02110-1301, USA.
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(dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
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"andoui $rt,$rs,$hi16"
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(+ OP_ANDOUI rs rt hi16)
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(set rt (and rs (or (sll hi16 16) #xFFFF)))
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())
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(dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
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"andoui ${rt-rs},$hi16"
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(+ OP_ANDOUI rt-rs hi16)
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(set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
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())
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(dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
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"orui ${rt-rs},$hi16"
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(+ OP_ORUI rt-rs hi16)
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(set rt-rs (or rt-rs (sll hi16 16)))
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())
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(dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
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"orui $rt,$rs,$hi16"
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(+ OP_ORUI rs rt hi16)
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(set rt (or rs (sll hi16 16)))
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())
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(dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
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"bgtz $rs,$offset"
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(+ OP_BGTZ rs (f-rt 0) offset)
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(if (gt rs 0)
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(delay 1 (set pc offset)))
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())
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(dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
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"bgtzl $rs,$offset"
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(+ OP_BGTZL rs (f-rt 0) offset)
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(if (gt rs 0)
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(delay 1 (set pc offset))
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(skip 1))
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())
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(dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
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"blez $rs,$offset"
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(+ OP_BLEZ rs (f-rt 0) offset)
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(if (le rs 0)
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(delay 1 (set pc offset)))
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())
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(dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
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"blezl $rs,$offset"
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(+ OP_BLEZL rs (f-rt 0) offset)
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(if (le rs 0)
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(delay 1 (set pc offset))
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(skip 1))
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())
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(dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
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"mrgb $rd,$rs,$rt,$mask"
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(+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB)
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(sequence ((SI temp))
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(if (bitclear? mask 0)
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(set temp (and rs #xFF))
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(set temp (and rt #xFF)))
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(if (bitclear? mask 1)
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(set temp (or temp (and rs #xFF00)))
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(set temp (or temp (and rt #xFF00))))
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(if (bitclear? mask 2)
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(set temp (or temp (and rs #xFF0000)))
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(set temp (or temp (and rt #xFF0000))))
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(if (bitclear? mask 3)
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(set temp (or temp (and rs #xFF000000)))
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(set temp (or temp (and rt #xFF000000))))
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(set rd temp))
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())
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(dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
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"mrgb ${rd-rs},$rt,$mask"
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(+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB)
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(sequence ((SI temp))
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(if (bitclear? mask 0)
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(set temp (and rd-rs #xFF))
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(set temp (and rt #xFF)))
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(if (bitclear? mask 1)
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(set temp (or temp (and rd-rs #xFF00)))
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(set temp (or temp (and rt #xFF00))))
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(if (bitclear? mask 2)
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(set temp (or temp (and rd-rs #xFF0000)))
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(set temp (or temp (and rt #xFF0000))))
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(if (bitclear? mask 3)
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(set temp (or temp (and rd-rs #xFF000000)))
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(set temp (or temp (and rt #xFF000000))))
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(set rd-rs temp))
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())
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; NOTE: None of these instructions' semantics are specified, so they
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; will not work in a simulator.
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;
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; Architectural and coprocessor instructions.
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; BREAK and SYSCALL are implemented with escape hatches to the C
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; code. These are used by the test suite to indicate pass/failures.
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(dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS)
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"bctxt $rs,$offset"
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(+ OP_REGIMM rs (f-rt 6) offset)
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(unimp bctxt)
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())
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(dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI)
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"bc0f $offset"
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(+ OP_COP0 (f-rs 8) (f-rt 0) offset)
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(unimp bc0f)
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())
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(dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
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"bc0fl $offset"
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(+ OP_COP0 (f-rs 8) (f-rt 2) offset)
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(unimp bc0fl)
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())
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(dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI)
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"bc3f $offset"
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(+ OP_COP3 (f-rs 8) (f-rt 0) offset)
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(unimp bc3f)
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())
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(dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
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"bc3fl $offset"
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(+ OP_COP3 (f-rs 8) (f-rt 2) offset)
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(unimp bc3fl)
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())
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(dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI)
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"bc0t $offset"
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(+ OP_COP0 (f-rs 8) (f-rt 1) offset)
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(unimp bc0t)
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())
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(dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
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"bc0tl $offset"
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(+ OP_COP0 (f-rs 8) (f-rt 3) offset)
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(unimp bc0tl)
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())
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(dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI)
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"bc3t $offset"
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(+ OP_COP3 (f-rs 8) (f-rt 1) offset)
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(unimp bc3t)
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())
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(dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
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"bc3tl $offset"
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(+ OP_COP3 (f-rs 8) (f-rt 3) offset)
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(unimp bc3tl)
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())
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; Note that we don't set the USES-RD or USES-RT attributes for many of the following
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; instructions, as it's the COP register that's being specified.
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(dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
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"cfc0 $rt,$rd"
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(+ OP_COP0 (f-rs 2) rt rd (f-10-11 0))
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(unimp cfc0)
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())
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(dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
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"cfc1 $rt,$rd"
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(+ OP_COP1 (f-rs 2) rt rd (f-10-11 0))
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(unimp cfc1)
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())
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(dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
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"cfc2 $rt,$rd"
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(+ OP_COP2 (f-rs 2) rt rd (f-10-11 0))
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(unimp cfc2)
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())
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(dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
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"cfc3 $rt,$rd"
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(+ OP_COP3 (f-rs 2) rt rd (f-10-11 0))
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(unimp cfc3)
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())
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; COPz instructions are an instruction form, not real instructions
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; with associated assembly mnemonics. Therefore, they are omitted
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; from the ISA description.
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(dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
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"chkhdr $rd,$rt"
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(+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0))
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(unimp chkhdr)
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())
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(dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
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"ctc0 $rt,$rd"
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(+ OP_COP0 (f-rs 6) rt rd (f-10-11 0))
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(unimp ctc0)
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())
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(dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
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"ctc1 $rt,$rd"
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(+ OP_COP1 (f-rs 6) rt rd (f-10-11 0))
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(unimp ctc1)
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())
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(dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
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"ctc2 $rt,$rd"
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(+ OP_COP2 (f-rs 6) rt rd (f-10-11 0))
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(unimp ctc2)
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())
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(dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
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"ctc3 $rt,$rd"
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(+ OP_COP3 (f-rs 6) rt rd (f-10-11 0))
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(unimp ctc3)
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())
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(dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS)
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"jcr $rs"
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(+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR)
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(unimp jcr)
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())
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(dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"luc32 $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
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(unimp luc32)
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())
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(dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"luc32l $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
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(unimp luc32l)
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())
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(dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"luc64 $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11))
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(unimp luc64)
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())
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(dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"luc64l $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15))
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(unimp luc64l)
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())
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(dni luk "lookup key" (MACH2000 USES-RD USES-RT)
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"luk $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8))
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(unimp luk)
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())
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(dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN)
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"lulck $rt"
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(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4))
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(unimp lulck)
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())
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(dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lum32 $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
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(unimp lum32)
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())
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(dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lum32l $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
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(unimp lum32l)
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())
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(dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lum64 $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10))
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(unimp lum64)
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())
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(dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lum64l $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14))
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(unimp lum64l)
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())
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(dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lur $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
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(unimp lur)
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())
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(dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"lurl $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5))
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(unimp lurl)
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())
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(dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN)
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"luulck $rt"
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(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0))
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(unimp luulck)
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())
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(dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
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"mfc0 $rt,$rd"
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(+ OP_COP0 (f-rs 0) rt rd (f-10-11 0))
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(unimp mfc0)
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())
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(dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
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"mfc1 $rt,$rd"
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(+ OP_COP1 (f-rs 0) rt rd (f-10-11 0))
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(unimp mfc1)
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())
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(dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
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"mfc2 $rt,$rd"
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(+ OP_COP2 (f-rs 0) rt rd (f-10-11 0))
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(unimp mfc2)
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())
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(dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
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"mfc3 $rt,$rd"
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(+ OP_COP3 (f-rs 0) rt rd (f-10-11 0))
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(unimp mfc3)
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())
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(dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT)
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"mtc0 $rt,$rd"
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(+ OP_COP0 (f-rs 4) rt rd (f-10-11 0))
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(unimp mtc0)
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())
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(dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT)
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"mtc1 $rt,$rd"
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(+ OP_COP1 (f-rs 4) rt rd (f-10-11 0))
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(unimp mtc1)
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())
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(dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT)
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"mtc2 $rt,$rd"
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(+ OP_COP2 (f-rs 4) rt rd (f-10-11 0))
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(unimp mtc2)
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())
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(dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT)
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"mtc3 $rt,$rd"
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(+ OP_COP3 (f-rs 4) rt rd (f-10-11 0))
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(unimp mtc3)
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())
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(dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"pkrl $rd,$rt"
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(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
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(unimp pkrl)
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())
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(dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN)
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"pkrlr1 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 29) rt count _index)
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(unimp pkrlr1)
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())
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(dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN)
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"pkrlr30 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 31) rt count _index)
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(unimp pkrlr30)
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())
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(dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"rb $rd,$rt"
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(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4))
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(unimp rb)
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())
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(dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN)
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"rbr1 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 24) rt count _index)
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(unimp rbr1)
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())
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(dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN)
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"rbr30 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 26) rt count _index)
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(unimp rbr30)
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())
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(dni rfe "restore from exception" (MACH2000)
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"rfe"
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(+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16))
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(unimp rfe)
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())
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(dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
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"rx $rd,$rt"
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(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
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(unimp rx)
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())
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(dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN)
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"rxr1 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 28) rt count _index)
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(unimp rxr1)
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())
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(dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN)
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"rxr30 $rt,$_index,$count"
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(+ OP_COP3 (f-rs 30) rt count _index)
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(unimp rxr30)
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())
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(dni sleep "sleep" (MACH2000 YIELD-INSN)
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"sleep"
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(+ OP_SPECIAL execode FUNC_SLEEP)
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(unimp sleep)
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())
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(dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN)
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"srrd $rt"
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(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16))
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(unimp srrd)
|
|
())
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|
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(dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN)
|
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"srrdl $rt"
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(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20))
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|
(unimp srrdl)
|
|
())
|
|
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(dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN)
|
|
"srulck $rt"
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(+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22))
|
|
(unimp srulck)
|
|
())
|
|
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(dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
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"srwr $rt,$rd"
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(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17))
|
|
(unimp srwr)
|
|
())
|
|
|
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(dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
|
"srwru $rt,$rd"
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|
(+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21))
|
|
(unimp srwru)
|
|
())
|
|
|
|
(dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN)
|
|
"trapqfl"
|
|
(+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8))
|
|
(unimp trapqfl)
|
|
())
|
|
|
|
(dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN)
|
|
"trapqne"
|
|
(+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9))
|
|
(unimp trapqne)
|
|
())
|
|
|
|
(dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN)
|
|
"traprel $rt"
|
|
(+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10))
|
|
(unimp traprel)
|
|
())
|
|
|
|
(dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
|
"wb $rd,$rt"
|
|
(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0))
|
|
(unimp wb)
|
|
())
|
|
|
|
(dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
|
"wbu $rd,$rt"
|
|
(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
|
|
(unimp wbu)
|
|
())
|
|
|
|
(dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN)
|
|
"wbr1 $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 16) rt count _index)
|
|
(unimp wbr1)
|
|
())
|
|
|
|
(dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
|
|
"wbr1u $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 17) rt count _index)
|
|
(unimp wbr1u)
|
|
())
|
|
|
|
(dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN)
|
|
"wbr30 $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 18) rt count _index)
|
|
(unimp wbr30)
|
|
())
|
|
|
|
(dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
|
|
"wbr30u $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 19) rt count _index)
|
|
(unimp wbr30u)
|
|
())
|
|
|
|
(dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
|
"wx $rd,$rt"
|
|
(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
|
|
(unimp wx)
|
|
())
|
|
|
|
(dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
|
|
"wxu $rd,$rt"
|
|
(+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
|
|
(unimp wxu)
|
|
())
|
|
|
|
(dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN)
|
|
"wxr1 $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 20) rt count _index)
|
|
(unimp wxr1)
|
|
())
|
|
|
|
(dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
|
|
"wxr1u $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 21) rt count _index)
|
|
(unimp wxr1u)
|
|
())
|
|
|
|
(dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN)
|
|
"wxr30 $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 22) rt count _index)
|
|
(unimp wxr30)
|
|
())
|
|
|
|
(dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
|
|
"wxr30u $rt,$_index,$count"
|
|
(+ OP_COP3 (f-rs 23) rt count _index)
|
|
(unimp wxr30u)
|
|
())
|
|
|
|
|
|
; Load/Store instructions.
|
|
|
|
(dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
|
|
"ldw $rt,$lo16($base)"
|
|
(+ OP_LDW base rt lo16)
|
|
(sequence ((SI addr))
|
|
(set addr (and (add base lo16) (inv 3)))
|
|
(set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr))
|
|
(set rt (mem SI (add addr 4))))
|
|
())
|
|
|
|
(dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT)
|
|
"sdw $rt,$lo16($base)"
|
|
(+ OP_SDW base rt lo16)
|
|
(sequence ((SI addr))
|
|
(set addr (and (add base lo16) (inv 3)))
|
|
(set (mem SI (add addr 4)) rt)
|
|
(set (mem SI addr) (reg h-gr (add (ifield f-rt) 1))))
|
|
())
|
|
|
|
|
|
; Jump instructions
|
|
|
|
(dni j "jump" (MACH2000)
|
|
"j $jmptarg"
|
|
(+ OP_J (f-rsrvd 0) jmptarg)
|
|
(delay 1 (set pc jmptarg))
|
|
())
|
|
|
|
(dni jal "jump and link" (MACH2000 USES-R31)
|
|
"jal $jmptarg"
|
|
(+ OP_JAL (f-rsrvd 0) jmptarg)
|
|
(delay 1
|
|
(sequence ()
|
|
(set (reg h-gr 31) (add pc 8))
|
|
(set pc jmptarg)))
|
|
())
|
|
|
|
(dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT)
|
|
"bmb $rs,$rt,$offset"
|
|
(+ OP_BMB rs rt offset)
|
|
(sequence ((BI branch?))
|
|
(set branch? 0)
|
|
(if (eq (and rs #xFF) (and rt #xFF))
|
|
(set branch? 1))
|
|
(if (eq (and rs #xFF00) (and rt #xFF00))
|
|
(set branch? 1))
|
|
(if (eq (and rs #xFF0000) (and rt #xFF0000))
|
|
(set branch? 1))
|
|
(if (eq (and rs #xFF000000) (and rt #xFF000000))
|
|
(set branch? 1))
|
|
(if branch?
|
|
(delay 1 (set pc offset))))
|
|
())
|
|
|
|
|
|
; Macros
|
|
|
|
(dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS)
|
|
"ldw $rt,$lo16"
|
|
(emit ldw rt lo16 (base 0))
|
|
)
|
|
|
|
(dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS)
|
|
"sdw $rt,$lo16"
|
|
(emit sdw rt lo16 (base 0))
|
|
)
|
|
|
|
|
|
|
|
|
|
|
|
|