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* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerate. * elf32-arm.c: Include libiberty.h and elf-vxworks.h. (RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros. (elf32_arm_vxworks_bed): Add forward declaration. (elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12. (elf32_arm_vxworks_exec_plt0_entry): New table. (elf32_arm_vxworks_exec_plt_entry): Likewise. (elf32_arm_vxworks_shared_plt_entry): Likewise. (elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields. (reloc_section_p): New function. (create_got_section): Use RELOC_SECTION. (elf32_arm_create_dynamic_sections): Likewise. Call elf_vxworks_create_dynamic_sections for VxWorks targets. Choose between the two possible values of plt_header_size and plt_entry_size. (elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2. (elf32_arm_abs12_reloc): New function. (elf32_arm_final_link_relocate): Call it. Allow the creation of dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p, RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the r_addend fields of relocs. On rela targets, skip any code that adjusts in-place addends. When using _bfd_link_final_relocate to perform a final relocation, pass rel->r_addend as the addend argument. (elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks object, ignore flags that are not standard on VxWorks. (elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p. (elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE. (allocate_dynrelocs): Use RELOC_SIZE. Account for the size of .rela.plt.unloaded relocs on VxWorks targets. (elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for .rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags instead of DT_REL* tags on RELA targets. (elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks. (elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ like DT_RELSZ. Handle the VxWorks form of initial PLT entry. Correct the .rela.plt.unreloaded symbol indexes. (elf32_arm_output_symbol_hook): Call the VxWorks version of this hook on VxWorks targets. (elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true. Minor formatting tweak. (elf32_arm_vxworks_final_write_processing): New function. (elf_backend_add_symbol_hook): Override for VxWorks and reset for Symbian. (elf_backend_final_write_processing): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_want_plt_sym): Likewise. (ELF_MAXPAGESIZE): Likewise. (elf_backend_may_use_rel_p): Minor formatting tweak. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_rela_normal): Likewise. * Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h. gas/ * config/tc-arm.c (md_apply_fix): Install a value of zero into a BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA R_ARM_ABS12 reloc. (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets. gas/testsuite/ * gas/arm/abs12.s, gas/arm/abs12.d: New test. * gas/arm/pic.d: Skip for *-*-vxworks*... * gas/arm/pic_vxworks.d: ...use this version instead. * gas/arm/unwind_vxworks.d: Fix expected output. ld/ * emulparams/armelf_vxworks.sh: Include vxworks.sh. (MAXPAGESIZE): Define. * emulparams/vxworks.sh: Undefine. * Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em. * Makefile.in: Regenerate. ld/testsuite/ * ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd, * ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd, * ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s, * ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd, * ld-arm/vxworks2-static.sd: New tests. * ld-arm/arm-elf.exp: Run them.
41 lines
1.5 KiB
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41 lines
1.5 KiB
Text
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.*: file format .*
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>
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80804: e79cf009 ldr pc, \[ip, r9\]
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80808: 0000000c andeq r0, r0, ip
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8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
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80810: e599f008 ldr pc, \[r9, #8\]
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80814: 00000000 andeq r0, r0, r0
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80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
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8081c: e79cf009 ldr pc, \[ip, r9\]
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80820: 00000010 andeq r0, r0, r0, lsl r0
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80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c>
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80828: e599f008 ldr pc, \[r9, #8\]
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8082c: 0000000c andeq r0, r0, ip
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Disassembly of section \.text:
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00080c00 <foo>:
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80c00: e92dc200 stmdb sp!, {r9, lr, pc}
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80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <\.text\+0x30>
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80c08: e5999000 ldr r9, \[r9\]
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80c0c: e5999000 ldr r9, \[r9\]
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80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <\.text\+0x34>
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80c14: e7991000 ldr r1, \[r9, r0\]
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80c18: e2811001 add r1, r1, #1 ; 0x1
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80c1c: e7891000 str r1, \[r9, r0\]
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80c20: eb000004 bl 80c38 <slocal>
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80c24: ebfffefb bl 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
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80c28: ebfffef4 bl 80800 <_PROCEDURE_LINKAGE_TABLE_>
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80c2c: e8bd8200 ldmia sp!, {r9, pc}
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80c30: 00000000 andeq r0, r0, r0
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80c34: 00000014 andeq r0, r0, r4, lsl r0
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00080c38 <slocal>:
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80c38: e1a0f00e mov pc, lr
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00080c3c <sglobal>:
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80c3c: e1a0f00e mov pc, lr
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