c18392d87d
ld/ * configure.tgt: Add Visium support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32visium.c. (eelf32visium.c): New rule. * Makefile.in: Regenerate. * emulparams/elf32visium.sh: New file. * scripttempl/visium.sc: Likewise. ld/testsuite/ * lib/ld-lib.exp (check_shared_lib_support): Return 0 for Visium. * ld-visium/: New directory.
23 lines
864 B
Makefile
23 lines
864 B
Makefile
#name: --set-section-flags test 1 (sections)
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#ld: -Tflags1.ld
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#objcopy_linked_file: --set-section-flags .post_text_reserve=contents,alloc,load,readonly,code
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#readelf: -l --wide
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#xfail: "avr-*-*" "dlx-*-*" "h8300-*-*" "i960-*-*" "ip2k-*-*" "m32r-*-*"
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#xfail: "moxie-*-*" "mt-*-*" "visium-*-*" "*-*-nacl*"
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#xfail: "*-*-hpux*" "hppa*64*-*-*"
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# Fails on the AVR, DLX, H8300, I960, IP2K, M32R, MOXIE, MT, VISIUM
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# and all NaCl targets,
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# because the two sections are not merged into one segment.
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# (There is no good reason why they have to be).
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# Fails on HPUX systems because the .type pseudo-op behaves differently.
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# Fails on hppa64 because a PHDR is always added.
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#...
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Program Headers:
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Type.*
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LOAD +0x[0-9a-f]+ 0x0*0 0x0*0 0x0*01(6[1-9a-f]|70) 0x0*01(6[1-9a-f]|70) RWE 0x[0-9a-f]+
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#...
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Segment Sections...
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00[ \t]+.text .post_text_reserve[ \t]*
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#pass
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