814 lines
18 KiB
C
814 lines
18 KiB
C
/* Print m68k instructions for objdump
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Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
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This file is part of the binutils.
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The binutils are free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 1, or (at your option)
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any later version.
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The binutils are distributed in the hope that they will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with the binutils; see the file COPYING. If not, write to
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the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* $Id$
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$Log$
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Revision 1.3 1991/10/11 11:22:00 gnu
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Include bfd.h before sysdep.h, so ansidecl and PROTO() get defined first.
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* Revision 1.2 1991/06/14 22:54:44 steve
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* *** empty log message ***
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*
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* Revision 1.1.1.1 1991/03/21 21:26:46 gumby
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* Back from Intel with Steve
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*
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* Revision 1.1 1991/03/21 21:26:45 gumby
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* Initial revision
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*
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* Revision 1.1 1991/03/13 00:34:06 chrisb
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* Initial revision
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*
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* Revision 1.4 1991/03/09 04:36:34 rich
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* Modified Files:
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* sparc-pinsn.c ostrip.c objdump.c m68k-pinsn.c i960-pinsn.c
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* binutils.h
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*
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* Pulled sysdep.h out of bfd.h.
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*
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* Revision 1.3 1991/03/08 21:54:45 rich
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* Modified Files:
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* Makefile ar.c binutils.h bucomm.c copy.c cplus-dem.c getopt.c
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* i960-pinsn.c m68k-pinsn.c nm.c objdump.c sparc-opcode.h
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* sparc-pinsn.c strip.c
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*
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* Verifying Portland tree with steve's last changes. Also, some partial
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* porting.
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*
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* Revision 1.2 1991/03/08 07:46:24 sac
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* Added -l option to disassembly - prints line numbers too.
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*
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* Revision 1.1 1991/02/22 16:48:02 sac
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* Initial revision
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*
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*/
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#include "bfd.h"
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#include "sysdep.h"
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#include <stdio.h>
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#include "m68k-opcode.h"
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extern int fputs();
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extern void print_address();
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/* 68k instructions are never longer than this many bytes. */
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#define MAXLEN 22
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/* Number of elements in the opcode table. */
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#define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
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extern char *reg_names[];
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char *fpcr_names[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
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"fpiar/fpcr", "fpsr/fpcr", "fpiar-fpcr"};
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char *reg_names[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
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static unsigned char *print_insn_arg ();
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static unsigned char *print_indexed ();
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static void print_base ();
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static int fetch_arg ();
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#define NEXTBYTE(p) (p += 2, ((char *)p)[-1])
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#define NEXTWORD(p) \
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(p += 2, ((((char *)p)[-2]) << 8) + p[-1])
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#define NEXTLONG(p) \
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(p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
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#define NEXTSINGLE(p) \
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(p += 4, *((float *)(p - 4)))
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#define NEXTDOUBLE(p) \
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(p += 8, *((double *)(p - 8)))
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#define NEXTEXTEND(p) \
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(p += 12, 0.0) /* Need a function to convert from extended to double
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precision... */
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#define NEXTPACKED(p) \
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(p += 12, 0.0) /* Need a function to convert from packed to double
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precision. Actually, it's easier to print a
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packed number than a double anyway, so maybe
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there should be a special case to handle this... */
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/* Print the m68k instruction at address MEMADDR in debugged memory,
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on STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn_m68k(addr, buffer, stream)
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bfd_vma addr;
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unsigned char *buffer;
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FILE *stream;
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{
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register unsigned int i;
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register unsigned char *p;
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register char *d;
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register unsigned int bestmask;
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int best;
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bestmask = 0;
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best = -1;
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for (i = 0; i < NOPCODES; i++)
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{
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register unsigned int opcode = m68k_opcodes[i].opcode;
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register unsigned int match = m68k_opcodes[i].match;
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if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
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&& ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
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&& ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
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&& ((0xff & buffer[3] & match) == (0xff & opcode)))
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{
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/* Don't use for printout the variants of divul and divsl
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that have the same register number in two places.
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The more general variants will match instead. */
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for (d = m68k_opcodes[i].args; *d; d += 2)
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if (d[1] == 'D')
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break;
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/* Don't use for printout the variants of most floating
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point coprocessor instructions which use the same
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register number in two places, as above. */
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if (*d == 0)
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for (d = m68k_opcodes[i].args; *d; d += 2)
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if (d[1] == 't')
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break;
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if (*d == 0 && match > bestmask)
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{
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best = i;
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bestmask = match;
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}
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}
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}
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/* Handle undefined instructions. */
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if (best < 0)
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{
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fprintf (stream, "0%o", (unsigned) (buffer[0] << 8) + buffer[1]);
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return 2;
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}
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fprintf (stream, "%s", m68k_opcodes[best].name);
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/* Point at first word of argument data,
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and at descriptor for first argument. */
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p = buffer + 2;
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/* Why do this this way? -MelloN */
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for (d = m68k_opcodes[best].args; *d; d += 2)
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{
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if (d[0] == '#')
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{
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if (d[1] == 'l' && p - buffer < 6)
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p = buffer + 6;
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else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
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p = buffer + 4;
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}
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if (d[1] >= '1' && d[1] <= '3' && p - buffer < 4)
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p = buffer + 4;
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if (d[1] >= '4' && d[1] <= '6' && p - buffer < 6)
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p = buffer + 6;
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if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
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p = buffer + 4;
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}
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d = m68k_opcodes[best].args;
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if (*d)
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fputs (" ", stream);
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while (*d)
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{
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p = print_insn_arg (d, buffer, p, addr + p - buffer, stream);
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d += 2;
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if (*d && *(d - 2) != 'I' && *d != 'k')
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fputs (",", stream);
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}
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return p - buffer;
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}
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static unsigned char *
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print_insn_arg (d, buffer, p, addr, stream)
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char *d;
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unsigned char *buffer;
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register unsigned char *p;
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bfd_vma addr; /* PC for this arg to be relative to */
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FILE *stream;
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{
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register int val;
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register int place = d[1];
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int regno;
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register char *regname;
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register unsigned char *p1;
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register double flval;
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int flt_p;
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switch (*d)
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{
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case 'C':
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fprintf (stream, "ccr");
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break;
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case 'S':
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fprintf (stream, "sr");
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break;
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case 'U':
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fprintf (stream, "usp");
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break;
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case 'J':
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{
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static struct { char *name; int value; } names[]
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= {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
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{"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
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{"msp", 0x803}, {"isp", 0x804}};
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val = fetch_arg (buffer, place, 12);
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for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
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if (names[regno].value == val)
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{
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fprintf (stream, names[regno].name);
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break;
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}
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if (regno < 0)
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fprintf (stream, "%d", val);
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}
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break;
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case 'Q':
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val = fetch_arg (buffer, place, 3);
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if (val == 0) val = 8;
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fprintf (stream, "#%d", val);
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break;
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case 'M':
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val = fetch_arg (buffer, place, 8);
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if (val & 0x80)
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val = val - 0x100;
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fprintf (stream, "#%d", val);
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break;
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case 'T':
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val = fetch_arg (buffer, place, 4);
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fprintf (stream, "#%d", val);
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break;
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case 'D':
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fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 3)]);
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break;
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case 'A':
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fprintf (stream, "%s",
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reg_names[fetch_arg (buffer, place, 3) + 010]);
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break;
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case 'R':
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fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 4)]);
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break;
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case 'F':
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fprintf (stream, "fp%d", fetch_arg (buffer, place, 3));
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break;
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case 'O':
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val = fetch_arg (buffer, place, 6);
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if (val & 0x20)
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fprintf (stream, "%s", reg_names [val & 7]);
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else
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fprintf (stream, "%d", val);
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break;
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case '+':
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fprintf (stream, "%s@+",
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reg_names[fetch_arg (buffer, place, 3) + 8]);
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break;
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case '-':
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fprintf (stream, "%s@-",
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reg_names[fetch_arg (buffer, place, 3) + 8]);
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break;
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case 'k':
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if (place == 'k')
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fprintf (stream, "{%s}", reg_names[fetch_arg (buffer, place, 3)]);
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else if (place == 'C')
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{
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val = fetch_arg (buffer, place, 7);
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if ( val > 63 ) /* This is a signed constant. */
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val -= 128;
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fprintf (stream, "{#%d}", val);
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}
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else
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fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
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*d, place);
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break;
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case '#':
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case '^':
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p1 = buffer + (*d == '#' ? 2 : 4);
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if (place == 's')
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val = fetch_arg (buffer, place, 4);
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else if (place == 'C')
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val = fetch_arg (buffer, place, 7);
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else if (place == '8')
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val = fetch_arg (buffer, place, 3);
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else if (place == '3')
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val = fetch_arg (buffer, place, 8);
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else if (place == 'b')
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val = NEXTBYTE (p1);
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else if (place == 'w')
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val = NEXTWORD (p1);
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else if (place == 'l')
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val = NEXTLONG (p1);
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else
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fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
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*d, place);
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fprintf (stream, "#%d", val);
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break;
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case 'B':
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if (place == 'b')
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val = NEXTBYTE (p);
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else if (place == 'w')
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val = NEXTWORD (p);
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else if (place == 'l')
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val = NEXTLONG (p);
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else if (place == 'g')
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{
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val = ((char *)buffer)[1];
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if (val == 0)
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val = NEXTWORD (p);
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else if (val == -1)
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val = NEXTLONG (p);
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}
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else if (place == 'c')
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{
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if (buffer[1] & 0x40) /* If bit six is one, long offset */
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val = NEXTLONG (p);
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else
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val = NEXTWORD (p);
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}
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else
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fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
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*d, place);
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print_address (addr + val, stream);
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break;
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case 'd':
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val = NEXTWORD (p);
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fprintf (stream, "%s@(%d)",
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reg_names[fetch_arg (buffer, place, 3)], val);
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break;
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case 's':
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fprintf (stream, "%s",
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fpcr_names[fetch_arg (buffer, place, 3)]);
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break;
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case 'I':
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val = fetch_arg (buffer, 'd', 3); /* Get coprocessor ID... */
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if (val != 1) /* Unusual coprocessor ID? */
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fprintf (stream, "(cpid=%d) ", val);
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if (place == 'i')
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p += 2; /* Skip coprocessor extended operands */
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break;
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case '*':
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case '~':
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case '%':
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case ';':
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case '@':
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case '!':
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case '$':
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case '?':
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case '/':
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case '&':
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if (place == 'd')
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{
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val = fetch_arg (buffer, 'x', 6);
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val = ((val & 7) << 3) + ((val >> 3) & 7);
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}
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else
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val = fetch_arg (buffer, 's', 6);
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/* Get register number assuming address register. */
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regno = (val & 7) + 8;
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regname = reg_names[regno];
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switch (val >> 3)
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{
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case 0:
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fprintf (stream, "%s", reg_names[val]);
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break;
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case 1:
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fprintf (stream, "%s", regname);
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break;
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case 2:
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fprintf (stream, "%s@", regname);
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break;
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case 3:
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fprintf (stream, "%s@+", regname);
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break;
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case 4:
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fprintf (stream, "%s@-", regname);
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break;
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case 5:
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val = NEXTWORD (p);
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fprintf (stream, "%s@(%d)", regname, val);
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break;
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case 6:
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p = print_indexed (regno, p, addr, stream);
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break;
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case 7:
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switch (val & 7)
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{
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case 0:
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val = NEXTWORD (p);
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fprintf (stream, "@#");
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print_address (val, stream);
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break;
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case 1:
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val = NEXTLONG (p);
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fprintf (stream, "@#");
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print_address (val, stream);
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break;
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case 2:
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val = NEXTWORD (p);
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print_address (addr + val, stream);
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break;
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case 3:
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p = print_indexed (-1, p, addr, stream);
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break;
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case 4:
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flt_p = 1; /* Assume it's a float... */
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switch( place )
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{
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case 'b':
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val = NEXTBYTE (p);
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flt_p = 0;
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break;
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case 'w':
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val = NEXTWORD (p);
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flt_p = 0;
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break;
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case 'l':
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val = NEXTLONG (p);
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flt_p = 0;
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break;
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case 'f':
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flval = NEXTSINGLE(p);
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break;
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case 'F':
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flval = NEXTDOUBLE(p);
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break;
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case 'x':
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flval = NEXTEXTEND(p);
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break;
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case 'p':
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flval = NEXTPACKED(p);
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break;
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default:
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fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
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*d, place);
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}
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if ( flt_p ) /* Print a float? */
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fprintf (stream, "#%g", flval);
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else
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fprintf (stream, "#%d", val);
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break;
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default:
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fprintf (stream, "<invalid address mode 0%o>", (unsigned) val);
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}
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}
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break;
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case 'L':
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case 'l':
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if (place == 'w')
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{
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char doneany;
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p1 = buffer + 2;
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val = NEXTWORD (p1);
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/* Move the pointer ahead if this point is farther ahead
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than the last. */
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p = p1 > p ? p1 : p;
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if (val == 0)
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{
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fputs ("#0", stream);
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break;
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}
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if (*d == 'l')
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{
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register int newval = 0;
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for (regno = 0; regno < 16; ++regno)
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if (val & (0x8000 >> regno))
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newval |= 1 << regno;
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val = newval;
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}
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val &= 0xffff;
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doneany = 0;
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for (regno = 0; regno < 16; ++regno)
|
||
if (val & (1 << regno))
|
||
{
|
||
int first_regno;
|
||
if (doneany)
|
||
fputs ("/", stream);
|
||
doneany = 1;
|
||
fprintf (stream, "%s", reg_names[regno]);
|
||
first_regno = regno;
|
||
while (val & (1 << (regno + 1)))
|
||
++regno;
|
||
if (regno > first_regno)
|
||
fprintf (stream, "-%s", reg_names[regno]);
|
||
}
|
||
}
|
||
else if (place == '3')
|
||
{
|
||
/* `fmovem' insn. */
|
||
char doneany;
|
||
val = fetch_arg (buffer, place, 8);
|
||
if (val == 0)
|
||
{
|
||
fputs ("#0", stream);
|
||
break;
|
||
}
|
||
if (*d == 'l')
|
||
{
|
||
register int newval = 0;
|
||
for (regno = 0; regno < 8; ++regno)
|
||
if (val & (0x80 >> regno))
|
||
newval |= 1 << regno;
|
||
val = newval;
|
||
}
|
||
val &= 0xff;
|
||
doneany = 0;
|
||
for (regno = 0; regno < 8; ++regno)
|
||
if (val & (1 << regno))
|
||
{
|
||
int first_regno;
|
||
if (doneany)
|
||
fputs ("/", stream);
|
||
doneany = 1;
|
||
fprintf (stream, "fp%d", regno);
|
||
first_regno = regno;
|
||
while (val & (1 << (regno + 1)))
|
||
++regno;
|
||
if (regno > first_regno)
|
||
fprintf (stream, "-fp%d", regno);
|
||
}
|
||
}
|
||
else
|
||
abort ();
|
||
break;
|
||
|
||
default:
|
||
fprintf(stderr, "Invalid arg format in opcode table: \"%c\".", *d);
|
||
}
|
||
|
||
return (unsigned char *) p;
|
||
}
|
||
|
||
/* Fetch BITS bits from a position in the instruction specified by CODE.
|
||
CODE is a "place to put an argument", or 'x' for a destination
|
||
that is a general address (mode and register).
|
||
BUFFER contains the instruction. */
|
||
|
||
static int
|
||
fetch_arg (buffer, code, bits)
|
||
unsigned char *buffer;
|
||
char code;
|
||
int bits;
|
||
{
|
||
register int val;
|
||
switch (code)
|
||
{
|
||
case 's':
|
||
val = buffer[1];
|
||
break;
|
||
|
||
case 'd': /* Destination, for register or quick. */
|
||
val = (buffer[0] << 8) + buffer[1];
|
||
val >>= 9;
|
||
break;
|
||
|
||
case 'x': /* Destination, for general arg */
|
||
val = (buffer[0] << 8) + buffer[1];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case 'k':
|
||
val = (buffer[3] >> 4);
|
||
break;
|
||
|
||
case 'C':
|
||
val = buffer[3];
|
||
break;
|
||
|
||
case '1':
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 12;
|
||
break;
|
||
|
||
case '2':
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case '3':
|
||
case 'j':
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
break;
|
||
|
||
case '4':
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
val >>= 12;
|
||
break;
|
||
|
||
case '5':
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
val >>= 6;
|
||
break;
|
||
|
||
case '6':
|
||
val = (buffer[4] << 8) + buffer[5];
|
||
break;
|
||
|
||
case '7':
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 7;
|
||
break;
|
||
|
||
case '8':
|
||
val = (buffer[2] << 8) + buffer[3];
|
||
val >>= 10;
|
||
break;
|
||
|
||
default:
|
||
abort ();
|
||
}
|
||
|
||
switch (bits)
|
||
{
|
||
case 3:
|
||
return val & 7;
|
||
case 4:
|
||
return val & 017;
|
||
case 5:
|
||
return val & 037;
|
||
case 6:
|
||
return val & 077;
|
||
case 7:
|
||
return val & 0177;
|
||
case 8:
|
||
return val & 0377;
|
||
case 12:
|
||
return val & 07777;
|
||
default:
|
||
abort ();
|
||
return(0);
|
||
}
|
||
} /* fetch_arg() */
|
||
|
||
/* Print an indexed argument. The base register is BASEREG (-1 for pc).
|
||
P points to extension word, in buffer.
|
||
ADDR is the nominal core address of that extension word. */
|
||
|
||
static unsigned char *
|
||
print_indexed (basereg, p, addr, stream)
|
||
int basereg;
|
||
unsigned char *p;
|
||
FILE *stream;
|
||
bfd_vma addr;
|
||
{
|
||
register int word;
|
||
static char *scales[] = {"", "*2", "*4", "*8"};
|
||
register int base_disp;
|
||
register int outer_disp;
|
||
char buf[40];
|
||
|
||
word = NEXTWORD (p);
|
||
|
||
/* Generate the text for the index register.
|
||
Where this will be output is not yet determined. */
|
||
sprintf (buf, "[%s.%c%s]",
|
||
reg_names[(word >> 12) & 0xf],
|
||
(word & 0x800) ? 'l' : 'w',
|
||
scales[(word >> 9) & 3]);
|
||
|
||
/* Handle the 68000 style of indexing. */
|
||
|
||
if ((word & 0x100) == 0)
|
||
{
|
||
print_base (basereg,
|
||
((word & 0x80) ? word | 0xff00 : word & 0xff)
|
||
+ ((basereg == -1) ? addr : 0),
|
||
stream);
|
||
fputs (buf, stream);
|
||
return p;
|
||
}
|
||
|
||
/* Handle the generalized kind. */
|
||
/* First, compute the displacement to add to the base register. */
|
||
|
||
if (word & 0200)
|
||
basereg = -2;
|
||
if (word & 0100)
|
||
buf[0] = 0;
|
||
base_disp = 0;
|
||
switch ((word >> 4) & 3)
|
||
{
|
||
case 2:
|
||
base_disp = NEXTWORD (p);
|
||
break;
|
||
case 3:
|
||
base_disp = NEXTLONG (p);
|
||
}
|
||
if (basereg == -1)
|
||
base_disp += addr;
|
||
|
||
/* Handle single-level case (not indirect) */
|
||
|
||
if ((word & 7) == 0)
|
||
{
|
||
print_base (basereg, base_disp, stream);
|
||
fputs (buf, stream);
|
||
return p;
|
||
}
|
||
|
||
/* Two level. Compute displacement to add after indirection. */
|
||
|
||
outer_disp = 0;
|
||
switch (word & 3)
|
||
{
|
||
case 2:
|
||
outer_disp = NEXTWORD (p);
|
||
break;
|
||
case 3:
|
||
outer_disp = NEXTLONG (p);
|
||
}
|
||
|
||
fprintf (stream, "%d(", outer_disp);
|
||
print_base (basereg, base_disp, stream);
|
||
|
||
/* If postindexed, print the closeparen before the index. */
|
||
if (word & 4)
|
||
fprintf (stream, ")%s", buf);
|
||
/* If preindexed, print the closeparen after the index. */
|
||
else
|
||
fprintf (stream, "%s)", buf);
|
||
|
||
return p;
|
||
}
|
||
|
||
/* Print a base register REGNO and displacement DISP, on STREAM.
|
||
REGNO = -1 for pc, -2 for none (suppressed). */
|
||
|
||
static void
|
||
print_base (regno, disp, stream)
|
||
int regno;
|
||
int disp;
|
||
FILE *stream;
|
||
{
|
||
if (regno == -2)
|
||
fprintf (stream, "%d", disp);
|
||
else if (regno == -1)
|
||
fprintf (stream, "0x%x", (unsigned) disp);
|
||
else
|
||
fprintf (stream, "%d(%s)", disp, reg_names[regno]);
|
||
}
|