52 lines
1.6 KiB
Text
52 lines
1.6 KiB
Text
cache:Dest:Dest:
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cache:Dest:rDest:signed_word *:(&(CPU)->reg[Dest])
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#
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cache:Source1:Source1:
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cache:Source1:vSource1:signed_word:(GPR (Source1) + 0)
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#cache:Source1:vSource1:signed_word:(Source1 == 0 ? 0 : (CPU)->reg[Source1])
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#
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cache:Source2:Source2:
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cache:Source2:vSource2:signed_word:(GPR (Source2) + 0)
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#cache:Source2:vSource2:signed_word:(Source2 == 0 ? 0 : (CPU)->reg[Source2])
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#
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cache:Source:Source:
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cache:Source:vSource:signed_word:(GPR (Source) + 0)
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#cache:Source:vSource:signed_word:(Source == 0 ? 0 : (CPU)->reg[Source])
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#
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cache:IndOff:IndOff:
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cache:IndOff:rIndOff:signed_word:(GPR (IndOff) + 0)
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#cache:IndOff:rIndOff:signed_word:(IndOff == 0 ? 0 : (CPU)->reg[IndOff])
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#
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cache:Base:Base:
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cache:Base:vBase:signed_word:(GPR (Base) + 0)
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cache:Base:rBase:signed_word*:(&GPR (Base))
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#cache:Base:vBase:signed_word:(Base == 0 ? 0 : (CPU)->reg[Base])
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#
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cache:Link:Link:
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cache:Link:rLink:signed_word*:(&(CPU)->reg[Link])
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#
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# Trap Number
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cache:UTN:UTN:
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cache:INDTR:INDTR:
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cache:INDTR:UTN:unsigned_word:(INDTR == 0 ? 0 : (CPU)->reg[INDTR])
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#
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cache:A:A:
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#
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cache:SignedImmediate:SignedImmediate:
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cache:SignedImmediate:vSource1:signed_word:SEXT (SignedImmediate, 14)
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#
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cache:UnsignedImmediate:UnsignedImmediate:
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cache:UnsignedImmediate:vSource1:signed_word:UnsignedImmediate
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#
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cache:BITNUM:BITNUM:
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cache:Code:Code:
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cache:BITNUM:bitnum:int:(~BITNUM) & 0x1f
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#
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cache:SignedOffset:SignedOffset:
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cache:SignedOffset:vSignedOffset:signed_word:SEXT (SignedOffset, 14)
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#
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cache:UCRN:UCRN:
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cache:INDCR:INDCR:
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cache:INDCR:UCRN:unsigned32:(GPR (INDCR) + 0)
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#cache:INDCR:UCRN:unsigned32:(INDCR == 0 ? 0 : (CPU)->reg[INDCR])
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