c76b4bab30
* am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo. 2000-05-29 Alexandre Oliva <aoliva@cygnus.com> * interp.c (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Take additional state arguments. Print exception type and call program_interrupt. Adjust callers. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional arguments. * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Adjust prototypes. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise. * am33-2.igen: Adjust calls. 2000-05-19 Alexandre Oliva <aoliva@cygnus.com> * op_utils.c (cmp2fcc): Moved... * interp.c: ... here. 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or `signed64' where type width is relevant. 2000-05-15 Alexandre Oliva <aoliva@cygnus.com> * mn10300_sim.h: Include sim-fpu.h. (FD2FPU, FPU2FD): Enclose the FD argument in parentheses. (fpu_check_signal_exception): Declare. (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise. (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare. * interp.c (fpu_disabled_exception): Document. (fpu_unimp_exception): Likewise. (fpu_check_signal_exception): Define. (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise. (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise. (REG2VAL, ROUND, VAL2REG): Define shorthands. (fpu_status_ok): Define. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define. * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv, fmadd, fmsub, fnmadd, fnmsub): Use new functions. 2000-04-27 Alexandre Oliva <aoliva@cygnus.com> * interp.c (sim_create_inferior): Set PSW bit to enable FP insns if architecture is AM33/2.0. * am33.igen: Include am33-2.igen. 2000-04-23 Alexandre Oliva <aoliva@cygnus.com> * mn10300.igen (movm, call, ret, retf): Check for am33_2 too. * am33.igen (movm): Likewise. 2000-04-19 Alexandre Oliva <aoliva@cygnus.com> * am33.igen: Added `*am33_2' to some instructions that were missing it. 2000-04-07 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: New file. All insns implemented, but FP flags are only set for fcmp, exceptional conditions are not handled yet. * Makefile.in (IGEN_INSN): Added am33-2.igen. (tmp-igen): Added -M am33_2. * mn10300.igen, am33.igen: Added `*am33_2' to all insns. * gencode.c: Support FMT_D3. * mn10300_sim.h (dword): New type. (struct _state): Added fpregs. (REG_FPCR, FPCR): New define. All assorted bitmaps. (XS2FS, AS2FS, Xf2FD): New macros. (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise. (load_dword, store_dword): New functions or macros. (u642dw, dw2u64): New functions. (fpu_disabled_exception, fpu_unimp_exception): Declared. * interp.c (fpu_disabled_exception): Defined; no actual implementation. (fpu_unimp_exception): Likewise. * op_utils.c (cmp2fcc): New function.
127 lines
4 KiB
Makefile
127 lines
4 KiB
Makefile
# Makefile template for Configure for the mn10300 sim library.
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# Copyright (C) 1996, 1997, 2000, 2001, 2004 Free Software Foundation, Inc.
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# Written by Cygnus Support.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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## COMMON_PRE_CONFIG_FRAG
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MN10300_OBJS = \
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itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \
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$(SIM_NEW_COMMON_OBJS) \
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op_utils.o \
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sim-engine.o \
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sim-hload.o \
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sim-hrw.o \
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sim-resume.o \
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sim-reason.o \
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sim-stop.o \
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dv-sockser.o
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SIM_OBJS = $(MN10300_OBJS) interp.o
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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SIM_EXTRA_CLEAN = clean-igen
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# Extra dependencies for "sim-main.h"
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SIM_EXTRA_DEPS = mn10300_sim.h itable.h idecode.h
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# Select mn10300 support in nltvals.def.
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NL_TARGET = -DNL_TARGET_mn10300
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INCLUDE = mn10300_sim.h $(srcdir)/../../include/gdb/callback.h
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# List of extra flags to always pass to $(CC).
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SIM_EXTRA_CFLAGS = -DPOLL_QUIT_INTERVAL=0x20
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## COMMON_POST_CONFIG_FRAG
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idecode.o op_utils.o semantics.o: targ-vals.h
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BUILT_SRC_FROM_IGEN = \
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icache.h \
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icache.c \
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idecode.h \
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idecode.c \
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semantics.h \
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semantics.c \
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model.h \
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model.c \
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support.h \
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support.c \
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itable.h \
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itable.c \
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engine.h \
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engine.c \
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irun.c
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$(BUILT_SRC_FROM_IGEN): tmp-igen
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.PHONY: clean-igen
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clean-igen:
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rm -f $(BUILT_SRC_FROM_IGEN)
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rm -f tmp-igen tmp-insns
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../igen/igen:
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cd ../igen && $(MAKE)
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IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
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IGEN_INSN=$(srcdir)/mn10300.igen $(srcdir)/am33.igen $(srcdir)/am33-2.igen
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IGEN_DC=$(srcdir)/mn10300.dc
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tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
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cd ../igen && $(MAKE)
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../igen/igen \
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$(IGEN_TRACE) \
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-G gen-direct-access \
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-M mn10300,am33 -G gen-multi-sim=am33 \
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-M am33_2 \
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-I $(srcdir) \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-x \
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-n icache.h -hc tmp-icache.h \
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-n icache.c -c tmp-icache.c \
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-n semantics.h -hs tmp-semantics.h \
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-n semantics.c -s tmp-semantics.c \
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-n idecode.h -hd tmp-idecode.h \
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-n idecode.c -d tmp-idecode.c \
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-n model.h -hm tmp-model.h \
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-n model.c -m tmp-model.c \
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-n support.h -hf tmp-support.h \
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-n support.c -f tmp-support.c \
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-n itable.h -ht tmp-itable.h \
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-n itable.c -t tmp-itable.c \
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-n engine.h -he tmp-engine.h \
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-n engine.c -e tmp-engine.c \
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-n irun.c -r tmp-irun.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
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touch tmp-igen
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interp.o: interp.c $(INCLUDE)
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