333 lines
11 KiB
Text
333 lines
11 KiB
Text
# PKE tests for code coverage
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#
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#
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#
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# ---- STCYCL/CYCLE ----
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#
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# Test STCYCL instruction
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0 0x0100fedc_00000000_00000000_00000000 0x00000000 PPPP
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# Attempt erroneous write to CYCLE register
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! 0x10003840 0x0000dead
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# Read CYCLE register; confirm proper value
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? 0x10003840 0x0000fedc 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- OFFSET/OFST ----
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#
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# Test OFFSET instruction on PKE1
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1 0x0200ffff_00000000_00000000_00000000 0x00000000 PPPP
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# Attempt erroneous write to OFFSET register
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! 0x10003cb0 0x0000dead
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# Read OFST register; confirm proper 10-bit value
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? 0x10003cb0 0x000003ff 0xffffffff
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# Read STAT register; confirm DBF=0
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? 0x10003c00 0x00000000 0x00000080
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# Read DBF register; confirm DBF=0
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? 0x10003cf0 0x00000000 0x00000001
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# Read STAT register; confirm ER1 not set
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? 0x10003c00 0x00000000 0x00002000
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#
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#
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# ---- BASE/BASE ----
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#
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# Test BASE instruction on PKE1
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1 0x0300ffff_00000000_00000000_00000000 0x00000000 PPPP
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# Attempt erroneous write to BASE register
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! 0x10003ca0 0x0000dead
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# Read BASE register; confirm proper 10-bit value
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? 0x10003ca0 0x000003ff 0xffffffff
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# Read STAT register; confirm DBF=0
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? 0x10003c00 0x00000000 0x00000080
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# Read DBF register; confirm DBF=0
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? 0x10003cf0 0x00000000 0x00000001
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#
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#
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# ---- ITOP/ITOPS ----
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#
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# Test ITOP instruction
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0 0x0400ffff_00000000_00000000_00000000 0x00000000 PPPP
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# Attempt erroneous write to ITOPS register
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! 0x10003890 0x0000dead
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# Read ITOPS register; confirm proper 10-bit value
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? 0x10003890 0x000003ff 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- STMOD/MODE ----
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#
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# Test STMOD instruction
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0 0x05000003_00000000_00000000_00000000 0x00000000 PPPP
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# Attempt erroneous write to MODE register
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! 0x10003850 0x0000dead
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# Read MODE register; confirm proper value
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? 0x10003850 0x00000003 0xffffffff
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# Test STMOD instruction with junk upper bits
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0 0x0500dad1_00000000_00000000_00000000 0x00000000 PPPP
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# Read MODE register; confirm proper value
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? 0x10003850 0x00000001 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- STMARK/MARK ----
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#
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# Test MARK instruction
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0 0x0700abcd_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm MRK bit set
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? 0x10003800 0x00000040 0x00000040
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# Read MARK register
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? 0x10003830 0x0000abcd 0xffffffff
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# Write MARK register
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! 0x10003830 0x00001234
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# Read STAT register; confirm MRK bit clear
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? 0x10003800 0x00000000 0x00000040
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# Read MARK register
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? 0x10003830 0x00001234 0xffffffff
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#
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#
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# ---- ERROR/ER1 ----
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#
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# A bad PKEcode
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1 0x00000000_00000000_00000000_08000000 0x00000000 PPPP
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# should put PKE into stalled mode, not executing following PKENOPs
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Read CODE register; confirm PKE is stuck at bad code
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? 0x10003c80 0x08000000 0xffffffff
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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#
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#
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# ---- STMASK/MASK ----
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#
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# Test STMASK instruction; leave operand out for now
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0 0x20000000_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003800 0x00000001 0x00000003
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# Add operand for STMASK instruction
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0 0x00000000_00000000_00000000_1234abcd 0x00000000 PPPP
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# Erroneous write to MASK register
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! 0x10003870 0x98765432
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# Read MASK register
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? 0x10003870 0x1234abcd 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- DIRECT ----
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#
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# Test DIRECT instruction; leave operand out for now
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1 0x50000001_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003c00 0x00000001 0x00000003
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# Supply operand - it's a bad GPUIF tag
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1 0x00000000_00000000_00000000_00000000 0x00000000 ....
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# Test DIRECT instruction with bad operand alignment
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1 0x00000000_50000001_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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# Test DIRECT instruction with bad operand alignment
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1 0x00000000_00000000_50000001_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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# Test DIRECT instruction with bad operand alignment
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1 0x00000000_00000000_00000000_50000001 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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#
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#
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# ---- MPG - PKE0 ----
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#
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# Test MPG instruction; leave operand out for now
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0 0x4a080000_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003800 0x00000001 0x00000003
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# Supply operands - eight two junk VU instruction word-pairs with real source-addr's
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0 0xdeadbeef_0bad0bad_beef0bad_2bad2bad 0x00000010 ....
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0 0xabcdbeef_44332211_12987423_95555999 0x00000100 ....
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0 0xdeadabcd_75577588_beef0bad_89abcdef 0x00001000 ....
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0 0xa5a5a5a5_5aaa5533_01234567_77889900 0x00010000 ....
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# Check that instructions were loaded properly
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? 0x11000000 0x2bad2bad 0xffffffff
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? 0x11000004 0xbeef0bad 0xffffffff
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? 0x11000014 0x12987423 0xffffffff
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? 0x11000028 0x75577588 0xffffffff
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? 0x1100003c 0xa5a5a5a5 0xffffffff
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# Check that source addresses were loaded properly
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? 0x21000000 0x00000010 0xffffffff
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? 0x21000004 0x00000010 0xffffffff
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? 0x21000008 0x00000100 0xffffffff
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? 0x2100000c 0x00000100 0xffffffff
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? 0x21000010 0x00001000 0xffffffff
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? 0x21000014 0x00001000 0xffffffff
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? 0x21000018 0x00010000 0xffffffff
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? 0x2100001c 0x00010000 0xffffffff
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# Test MPG instruction with bad operand alignment
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0 0x00000000_4a020000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003800 0x00002000 0x00002000
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# Reset PKE
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! 0x10003810 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003800 0x00000000 0x00002000
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# Test MPG instruction with good operand alignment
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0 0x00000000_00000000_4a010000_00000000 0x00000000 ..PP
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# Read STAT register; confirm ER1 bit not set
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? 0x10003800 0x00000000 0x00002000
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# Test MPG instruction with bad operand alignment
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0 0x00000000_00000000_00000000_4a010000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003800 0x00002000 0x00002000
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# Reset PKE
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! 0x10003810 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- MPG - PKE1 ----
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#
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# Test MPG instruction; leave operand out for now
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1 0x4a080000_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003c00 0x00000001 0x00000003
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# Supply operands - eight two junk VU instruction word-pairs with real source-addr's
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1 0xdeadbeef_0bad0bad_beef0bad_2bad2bad 0x00000010 ....
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1 0xabcdbeef_44332211_12987423_95555999 0x00000100 ....
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1 0xdeadabcd_75577588_beef0bad_89abcdef 0x00001000 ....
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1 0xa5a5a5a5_5aaa5533_01234567_77889900 0x00010000 ....
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# Check that instructions were loaded properly
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? 0x11008000 0x2bad2bad 0xffffffff
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? 0x11008004 0xbeef0bad 0xffffffff
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? 0x11008014 0x12987423 0xffffffff
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? 0x11008028 0x75577588 0xffffffff
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? 0x1100803c 0xa5a5a5a5 0xffffffff
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# Check that source addresses were loaded properly
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? 0x21008000 0x00000010 0xffffffff
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? 0x21008004 0x00000010 0xffffffff
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? 0x21008008 0x00000100 0xffffffff
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? 0x2100800c 0x00000100 0xffffffff
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? 0x21008010 0x00001000 0xffffffff
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? 0x21008014 0x00001000 0xffffffff
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? 0x21008018 0x00010000 0xffffffff
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? 0x2100801c 0x00010000 0xffffffff
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# Test MPG instruction with bad operand alignment
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1 0x00000000_4a020000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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# Test MPG instruction with good operand alignment
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1 0x00000000_00000000_4a010000_00000000 0x00000000 ..PP
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# Read STAT register; confirm ER1 bit not set
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? 0x10003c00 0x00000000 0x00002000
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# Test MPG instruction with bad operand alignment
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1 0x00000000_00000000_00000000_4a010000 0x00000000 PPPP
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# Read STAT register; confirm ER1 bit set
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? 0x10003c00 0x00002000 0x00002000
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# Reset PKE
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! 0x10003c10 0x00000001
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# Read STAT register; confirm ER1 no longer set
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? 0x10003c00 0x00000000 0x00002000
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#
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#
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# ---- STROW/ROW + DMA mismatch ----
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#
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# Test STROW instruction; leave operand out for now
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0 0x30000000_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003800 0x00000001 0x00000003
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# Write ERR register; mask ER0 stalling
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! 0x10003820 0x00000002
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# Supply operand - four words
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0 0x1234abcd_2345bcde_ffffffff_ffffffff 0x00000000 ..DD
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0 0x00000000_00000000_5432dcba_76543210 0x00000000 PP..
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# Read STAT register; confirm ER0 (DMA mismatch)
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? 0x10003800 0x00001000 0x00001000
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# Make erroneous write
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! 0x10003900 0x11111111
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! 0x10003910 0x22222222
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! 0x10003920 0x33333333
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! 0x10003930 0x44444444
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# Check row registers for value
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? 0x10003900 0x2345bcde 0xffffffff
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? 0x10003910 0x1234abcd 0xffffffff
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? 0x10003920 0x76543210 0xffffffff
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? 0x10003930 0x5432dcba 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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# Reset PKE
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! 0x10003810 0x00000001
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#
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#
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# ---- STCOL/COL + STOP/CONTINUE ----
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#
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# Test STCOL instruction; leave operand out for now
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0 0x31000000_00000000_00000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm PPS field set at WAIT
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? 0x10003800 0x00000001 0x00000003
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# Stop PKE with FBK bit
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! 0x10003810 0x00000002
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# Supply operand - four words
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0 0x1234abcd_2345bcde_5432dcba_76543210 0x00000000 ....
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# Confirm that PKE is continuing to stall due to FBK
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? 0x10003800 0x00000200 0x00000200
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? 0x10003800 0x00000200 0x00000200
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? 0x10003800 0x00000200 0x00000200
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# Resume PKE with STC bit
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! 0x10003810 0x00000008
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# Read STAT register; confirm FBK no longer set
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? 0x10003800 0x00000000 0x00000200
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# Check column registers for value
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? 0x10003940 0x76543210 0xffffffff
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? 0x10003950 0x5432dcba 0xffffffff
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? 0x10003960 0x2345bcde 0xffffffff
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? 0x10003970 0x1234abcd 0xffffffff
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# Read STAT register; confirm ER1 not set
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? 0x10003800 0x00000000 0x00002000
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#
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#
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# ---- MSKPATH3 ----
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#
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# Set then clear MSKPATH3 on PKE1
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1 0x06008000_00000000_06000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 not set
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? 0x10003c00 0x00000000 0x00002000
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# Erroneously run this on PKE0
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0 0x06008000_00000000_06000000_00000000 0x00000000 PPPP
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# Read STAT register; confirm ER1 set
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? 0x10003800 0x00002000 0x00002000
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# Reset PKE0
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! 0x10003810 0x00000001
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#
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#
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# ---- memory-mapped port reading ----
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#
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# Erroneously read words from FIFO ports
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? 0x10004000 0x00000000 0xffffffff
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? 0x10004004 0x00000000 0xffffffff
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? 0x10004008 0x00000000 0xffffffff
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? 0x1000400c 0x00000000 0xffffffff
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? 0x10005000 0x00000000 0xffffffff
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? 0x10005004 0x00000000 0xffffffff
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? 0x10005008 0x00000000 0xffffffff
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? 0x1000500c 0x00000000 0xffffffff
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#
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