86 lines
2.9 KiB
C
86 lines
2.9 KiB
C
/* M32R ELF support for BFD.
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Copyright 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _ELF_M32R_H
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#define _ELF_M32R_H
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#include "elf/reloc-macros.h"
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/* Relocations. */
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START_RELOC_NUMBERS (elf_m32r_reloc_type)
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RELOC_NUMBER (R_M32R_NONE, 0)
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RELOC_NUMBER (R_M32R_16, 1)
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RELOC_NUMBER (R_M32R_32, 2)
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RELOC_NUMBER (R_M32R_24, 3)
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RELOC_NUMBER (R_M32R_10_PCREL, 4)
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RELOC_NUMBER (R_M32R_18_PCREL, 5)
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RELOC_NUMBER (R_M32R_26_PCREL, 6)
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RELOC_NUMBER (R_M32R_HI16_ULO, 7)
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RELOC_NUMBER (R_M32R_HI16_SLO, 8)
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RELOC_NUMBER (R_M32R_LO16, 9)
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RELOC_NUMBER (R_M32R_SDA16, 10)
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RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)
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RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)
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END_RELOC_NUMBERS (R_M32R_max)
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/* Processor specific section indices. These sections do not actually
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exist. Symbols with a st_shndx field corresponding to one of these
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values have a special meaning. */
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/* Small common symbol. */
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#define SHN_M32R_SCOMMON 0xff00
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/* Processor specific section flags. */
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/* This section contains sufficient relocs to be relaxed.
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When relaxing, even relocs of branch instructions the assembler could
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complete must be present because relaxing may cause the branch target to
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move. */
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#define SHF_M32R_CAN_RELAX 0x10000000
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/* Processor specific flags for the ELF header e_flags field. */
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/* Two bit m32r architecture field. */
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#define EF_M32R_ARCH 0x30000000
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/* m32r code. */
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#define E_M32R_ARCH 0x00000000
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/* m32rx code. */
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#define E_M32RX_ARCH 0x10000000
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/* m32r2 code. */
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#define E_M32R2_ARCH 0x20000000
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/* 12 bit m32r new instructions field. */
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#define EF_M32R_INST 0x0FFF0000
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/* Parallel instructions. */
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#define E_M32R_HAS_PARALLEL 0x00010000
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/* Hidden instructions for m32rx:
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jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
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sc, snc. */
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#define E_M32R_HAS_HIDDEN_INST 0x00020000
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/* New bit instructions:
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clrpsw, setpsw, bset, bclr, btst. */
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#define E_M32R_HAS_BIT_INST 0x00040000
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/* Floating point instructions. */
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#define E_M32R_HAS_FLOAT_INST 0x00080000
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/* 4 bit m32r ignore to check field. */
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#define EF_M32R_IGNORE 0x0000000F
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#endif
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