6e4f085c7f
Other than the nice advantage of all sims having to declare one fewer common function, this also fixes leakage in pretty much every sim. Many were not freeing any resources, and a few were inconsistent as to the ones they did. Now we have a single module that takes care of all the logic for us. Most of the non-cgen based ones could be deleted outright. The cgen ones required adding a callback to the arch-specific cleanup func. The few that still have close callbacks are to manage their internal state. We do not convert erc32, m32c, ppc, rl78, or rx as they do not use the common sim core.
181 lines
4.7 KiB
C
181 lines
4.7 KiB
C
/* Main simulator entry points specific to the IQ2000.
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Copyright (C) 2000-2015 Free Software Foundation, Inc.
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Contributed by Cygnus Solutions.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "sim-main.h"
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#include "sim-options.h"
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#include "libiberty.h"
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#include "bfd.h"
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static void free_state (SIM_DESC);
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/* Records simulator descriptor so utilities like iq2000_dump_regs can be
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called from gdb. */
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SIM_DESC current_state;
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/* Cover function for sim_cgen_disassemble_insn. */
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void
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iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
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const ARGBUF *abuf, IADDR pc, char *buf)
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{
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sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf);
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}
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_MODULES (sd) != NULL)
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sim_module_uninstall (sd);
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sim_cpu_free_all (sd);
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sim_state_free (sd);
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}
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/* Create an instance of the simulator. */
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SIM_DESC
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sim_open (kind, callback, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *callback;
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struct bfd *abfd;
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char **argv;
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{
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char c;
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int i;
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SIM_DESC sd = sim_state_alloc (kind, callback);
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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#if 0 /* FIXME: pc is in mach-specific struct */
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/* FIXME: watchpoints code shouldn't need this */
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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STATE_WATCHPOINTS (sd)->pc = &(PC);
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STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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}
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#endif
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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#if 0 /* FIXME: 'twould be nice if we could do this */
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/* These options override any module options.
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Obviously ambiguity should be avoided, however the caller may wish to
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augment the meaning of an option. */
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if (extra_options != NULL)
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sim_add_option_table (sd, extra_options);
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#endif
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Allocate core managed memory. */
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sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE);
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sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE);
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/* check for/establish the reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Establish any remaining configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Open a copy of the cpu descriptor table. */
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{
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CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
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CGEN_ENDIAN_BIG);
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for (i = 0; i < MAX_NR_PROCESSORS; ++i)
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{
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SIM_CPU *cpu = STATE_CPU (sd, i);
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CPU_CPU_DESC (cpu) = cd;
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CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn;
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}
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iq2000_cgen_init_dis (cd);
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}
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/* Initialize various cgen things not done by common framework.
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Must be done after iq2000_cgen_cpu_open. */
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cgen_init (sd);
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/* Store in a global so things like sparc32_dump_regs can be invoked
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from the gdb command line. */
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current_state = sd;
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return sd;
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}
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SIM_RC
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sim_create_inferior (sd, abfd, argv, envp)
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SIM_DESC sd;
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struct bfd *abfd;
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char **argv;
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char **envp;
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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SIM_ADDR addr;
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if (abfd != NULL)
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addr = bfd_get_start_address (abfd);
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else
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addr = CPU2INSN(0);
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sim_pc_set (current_cpu, addr);
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#if 0
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STATE_ARGV (sd) = sim_copy_argv (argv);
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STATE_ENVP (sd) = sim_copy_argv (envp);
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#endif
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return SIM_RC_OK;
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}
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