336 lines
7.7 KiB
C
336 lines
7.7 KiB
C
/* cpu.c --- CPU for RL78 simulator.
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Copyright (C) 2011-2016 Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "config.h"
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include "opcode/rl78.h"
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#include "mem.h"
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#include "cpu.h"
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int verbose = 0;
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int trace = 0;
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int rl78_in_gdb = 1;
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int timer_enabled = 2;
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int rl78_g10_mode = 0;
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int g13_multiply = 0;
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int g14_multiply = 0;
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#define REGISTER_ADDRESS 0xffee0
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typedef struct {
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unsigned char x;
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unsigned char a;
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unsigned char c;
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unsigned char b;
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unsigned char e;
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unsigned char d;
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unsigned char l;
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unsigned char h;
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} RegBank;
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static void trace_register_init ();
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/* This maps PSW to a pointer into memory[] */
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static RegBank *regbase_table[256];
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#define regbase regbase_table[memory[RL78_SFR_PSW]]
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#define REG(r) ((regbase)->r)
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void
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init_cpu (void)
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{
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int i;
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init_mem ();
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memset (memory+REGISTER_ADDRESS, 0x11, 8 * 4);
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memory[RL78_SFR_PSW] = 0x06;
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memory[RL78_SFR_ES] = 0x0f;
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memory[RL78_SFR_CS] = 0x00;
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memory[RL78_SFR_PMC] = 0x00;
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for (i = 0; i < 256; i ++)
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{
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int rb0 = (i & RL78_PSW_RBS0) ? 1 : 0;
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int rb1 = (i & RL78_PSW_RBS1) ? 2 : 0;
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int rb = rb1 | rb0;
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regbase_table[i] = (RegBank *)(memory + (3 - rb) * 8 + REGISTER_ADDRESS);
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}
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trace_register_init ();
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/* This means "by default" */
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timer_enabled = 2;
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}
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SI
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get_reg (RL78_Register regno)
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{
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switch (regno)
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{
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case RL78_Reg_None:
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/* Conditionals do this. */
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return 0;
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default:
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abort ();
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case RL78_Reg_X: return REG (x);
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case RL78_Reg_A: return REG (a);
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case RL78_Reg_C: return REG (c);
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case RL78_Reg_B: return REG (b);
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case RL78_Reg_E: return REG (e);
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case RL78_Reg_D: return REG (d);
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case RL78_Reg_L: return REG (l);
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case RL78_Reg_H: return REG (h);
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case RL78_Reg_AX: return REG (a) * 256 + REG (x);
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case RL78_Reg_BC: return REG (b) * 256 + REG (c);
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case RL78_Reg_DE: return REG (d) * 256 + REG (e);
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case RL78_Reg_HL: return REG (h) * 256 + REG (l);
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case RL78_Reg_SP: return memory[RL78_SFR_SP] + 256 * memory[RL78_SFR_SP+1];
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case RL78_Reg_PSW: return memory[RL78_SFR_PSW];
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case RL78_Reg_CS: return memory[RL78_SFR_CS];
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case RL78_Reg_ES: return memory[RL78_SFR_ES];
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case RL78_Reg_PMC: return memory[RL78_SFR_PMC];
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case RL78_Reg_MEM: return memory[RL78_SFR_MEM];
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}
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}
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extern unsigned char initted[];
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SI
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set_reg (RL78_Register regno, SI val)
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{
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switch (regno)
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{
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case RL78_Reg_None:
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abort ();
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case RL78_Reg_X: REG (x) = val; break;
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case RL78_Reg_A: REG (a) = val; break;
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case RL78_Reg_C: REG (c) = val; break;
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case RL78_Reg_B: REG (b) = val; break;
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case RL78_Reg_E: REG (e) = val; break;
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case RL78_Reg_D: REG (d) = val; break;
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case RL78_Reg_L: REG (l) = val; break;
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case RL78_Reg_H: REG (h) = val; break;
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case RL78_Reg_AX:
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REG (a) = val >> 8;
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REG (x) = val & 0xff;
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break;
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case RL78_Reg_BC:
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REG (b) = val >> 8;
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REG (c) = val & 0xff;
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break;
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case RL78_Reg_DE:
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REG (d) = val >> 8;
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REG (e) = val & 0xff;
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break;
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case RL78_Reg_HL:
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REG (h) = val >> 8;
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REG (l) = val & 0xff;
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break;
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case RL78_Reg_SP:
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if (val & 1)
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{
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printf ("Warning: SP value 0x%04x truncated at pc=0x%05x\n", val, pc);
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val &= ~1;
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}
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{
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int old_sp = get_reg (RL78_Reg_SP);
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if (val < old_sp)
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{
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int i;
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for (i = val; i < old_sp; i ++)
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initted[i + 0xf0000] = 0;
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}
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}
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memory[RL78_SFR_SP] = val & 0xff;
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memory[RL78_SFR_SP + 1] = val >> 8;
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break;
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case RL78_Reg_PSW: memory[RL78_SFR_PSW] = val; break;
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case RL78_Reg_CS: memory[RL78_SFR_CS] = val; break;
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case RL78_Reg_ES: memory[RL78_SFR_ES] = val; break;
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case RL78_Reg_PMC: memory[RL78_SFR_PMC] = val; break;
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case RL78_Reg_MEM: memory[RL78_SFR_MEM] = val; break;
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}
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return val;
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}
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int
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condition_true (RL78_Condition cond_id, int val)
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{
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int psw = get_reg (RL78_Reg_PSW);
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int z = (psw & RL78_PSW_Z) ? 1 : 0;
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int cy = (psw & RL78_PSW_CY) ? 1 : 0;
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switch (cond_id)
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{
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case RL78_Condition_T:
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return val != 0;
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case RL78_Condition_F:
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return val == 0;
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case RL78_Condition_C:
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return cy;
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case RL78_Condition_NC:
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return !cy;
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case RL78_Condition_H:
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return !(z | cy);
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case RL78_Condition_NH:
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return z | cy;
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case RL78_Condition_Z:
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return z;
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case RL78_Condition_NZ:
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return !z;
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default:
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abort ();
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}
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}
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const char * const
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reg_names[] = {
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"none",
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"x",
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"a",
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"c",
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"b",
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"e",
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"d",
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"l",
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"h",
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"ax",
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"bc",
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"de",
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"hl",
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"sp",
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"psw",
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"cs",
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"es",
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"pmc",
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"mem"
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};
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static char *
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psw_string (int psw)
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{
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static char buf[30];
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const char *comma = "";
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buf[0] = 0;
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if (psw == 0)
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strcpy (buf, "-");
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else
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{
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#define PSW1(bit, name) if (psw & bit) { strcat (buf, comma); strcat (buf, name); comma = ","; }
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PSW1 (RL78_PSW_IE, "ie");
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PSW1 (RL78_PSW_Z, "z");
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PSW1 (RL78_PSW_RBS1, "r1");
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PSW1 (RL78_PSW_AC, "ac");
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PSW1 (RL78_PSW_RBS0, "r0");
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PSW1 (RL78_PSW_ISP1, "i1");
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PSW1 (RL78_PSW_ISP0, "i0");
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PSW1 (RL78_PSW_CY, "cy");
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}
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printf ("%s", buf);
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return buf;
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}
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static unsigned char old_regs[32];
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static int old_psw;
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static int old_sp;
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int trace_register_words;
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void
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trace_register_changes (void)
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{
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int i;
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int any = 0;
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if (!trace)
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return;
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#define TB(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%02x \033[32m%02x\033[0m ", name, ov, nv); ov = nv; any = 1; }
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#define TW(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%04x \033[32m%04x\033[0m ", name, ov, nv); ov = nv; any = 1; }
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if (trace_register_words)
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{
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#define TRW(name, idx) TW (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
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for (i = 0; i < 32; i += 2)
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{
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char buf[10];
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int o, n, a;
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switch (i)
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{
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case 0: strcpy (buf, "AX"); break;
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case 2: strcpy (buf, "BC"); break;
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case 4: strcpy (buf, "DE"); break;
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case 6: strcpy (buf, "HL"); break;
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default: sprintf (buf, "r%d", i); break;
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}
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a = REGISTER_ADDRESS + (i ^ 0x18);
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o = old_regs[i ^ 0x18] + old_regs[(i ^ 0x18) + 1] * 256;
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n = memory[a] + memory[a + 1] * 256;
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TW (buf, n, o);
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old_regs[i ^ 0x18] = n;
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old_regs[(i ^ 0x18) + 1] = n >> 8;
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}
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}
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else
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{
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for (i = 0; i < 32; i ++)
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{
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char buf[10];
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if (i < 8)
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{
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buf[0] = "XACBEDLH"[i];
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buf[1] = 0;
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}
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else
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sprintf (buf, "r%d", i);
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#define TRB(name, idx) TB (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
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TRB (buf, i ^ 0x18);
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}
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}
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if (memory[RL78_SFR_PSW] != old_psw)
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{
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printf ("PSW: \033[31m");
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psw_string (old_psw);
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printf (" \033[32m");
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psw_string (memory[RL78_SFR_PSW]);
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printf ("\033[0m ");
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old_psw = memory[RL78_SFR_PSW];
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any = 1;
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}
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TW ("SP", mem_get_hi (RL78_SFR_SP), old_sp);
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if (any)
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printf ("\n");
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}
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static void
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trace_register_init (void)
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{
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memcpy (old_regs, memory + REGISTER_ADDRESS, 8 * 4);
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old_psw = memory[RL78_SFR_PSW];
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old_sp = mem_get_hi (RL78_SFR_SP);
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}
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