034685f9ce
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
247 lines
6.3 KiB
C
247 lines
6.3 KiB
C
/* Lattice Mico32 CPU model.
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Contributed by Jon Beniston <jon@beniston.com>
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Copyright (C) 2009-2015 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "hw-main.h"
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#include "sim-main.h"
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struct lm32cpu
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{
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struct hw_event *event;
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};
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/* input port ID's. */
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enum
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{
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INT0_PORT,
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INT1_PORT,
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INT2_PORT,
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INT3_PORT,
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INT4_PORT,
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INT5_PORT,
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INT6_PORT,
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INT7_PORT,
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INT8_PORT,
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INT9_PORT,
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INT10_PORT,
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INT11_PORT,
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INT12_PORT,
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INT13_PORT,
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INT14_PORT,
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INT15_PORT,
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INT16_PORT,
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INT17_PORT,
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INT18_PORT,
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INT19_PORT,
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INT20_PORT,
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INT21_PORT,
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INT22_PORT,
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INT23_PORT,
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INT24_PORT,
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INT25_PORT,
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INT26_PORT,
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INT27_PORT,
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INT28_PORT,
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INT29_PORT,
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INT30_PORT,
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INT31_PORT,
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};
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static const struct hw_port_descriptor lm32cpu_ports[] = {
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/* interrupt inputs. */
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{"int0", INT0_PORT, 0, input_port,},
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{"int1", INT1_PORT, 0, input_port,},
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{"int2", INT2_PORT, 0, input_port,},
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{"int3", INT3_PORT, 0, input_port,},
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{"int4", INT4_PORT, 0, input_port,},
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{"int5", INT5_PORT, 0, input_port,},
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{"int6", INT6_PORT, 0, input_port,},
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{"int7", INT7_PORT, 0, input_port,},
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{"int8", INT8_PORT, 0, input_port,},
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{"int9", INT9_PORT, 0, input_port,},
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{"int10", INT10_PORT, 0, input_port,},
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{"int11", INT11_PORT, 0, input_port,},
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{"int12", INT12_PORT, 0, input_port,},
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{"int13", INT13_PORT, 0, input_port,},
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{"int14", INT14_PORT, 0, input_port,},
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{"int15", INT15_PORT, 0, input_port,},
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{"int16", INT16_PORT, 0, input_port,},
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{"int17", INT17_PORT, 0, input_port,},
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{"int18", INT18_PORT, 0, input_port,},
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{"int19", INT19_PORT, 0, input_port,},
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{"int20", INT20_PORT, 0, input_port,},
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{"int21", INT21_PORT, 0, input_port,},
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{"int22", INT22_PORT, 0, input_port,},
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{"int23", INT23_PORT, 0, input_port,},
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{"int24", INT24_PORT, 0, input_port,},
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{"int25", INT25_PORT, 0, input_port,},
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{"int26", INT26_PORT, 0, input_port,},
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{"int27", INT27_PORT, 0, input_port,},
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{"int28", INT28_PORT, 0, input_port,},
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{"int29", INT29_PORT, 0, input_port,},
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{"int30", INT30_PORT, 0, input_port,},
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{"int31", INT31_PORT, 0, input_port,},
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{NULL,},
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};
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/*
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* Finish off the partially created hw device. Attach our local
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* callbacks. Wire up our port names etc.
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*/
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static hw_port_event_method lm32cpu_port_event;
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static void
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lm32cpu_finish (struct hw *me)
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{
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struct lm32cpu *controller;
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controller = HW_ZALLOC (me, struct lm32cpu);
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set_hw_data (me, controller);
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set_hw_ports (me, lm32cpu_ports);
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set_hw_port_event (me, lm32cpu_port_event);
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/* Initialize the pending interrupt flags. */
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controller->event = NULL;
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}
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/* An event arrives on an interrupt port. */
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static unsigned int s_ui_ExtIntrs = 0;
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static void
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deliver_lm32cpu_interrupt (struct hw *me, void *data)
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{
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static unsigned int ip, im, im_and_ip_result;
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struct lm32cpu *controller = hw_data (me);
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SIM_DESC sd = hw_system (me);
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sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
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address_word cia = CPU_PC_GET (cpu);
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int interrupt = (int) data;
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HW_TRACE ((me, "interrupt-check event"));
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/*
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* Determine if an external interrupt is active
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* and needs to cause an exception.
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*/
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im = lm32bf_h_csr_get (cpu, LM32_CSR_IM);
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ip = lm32bf_h_csr_get (cpu, LM32_CSR_IP);
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im_and_ip_result = im & ip;
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if ((lm32bf_h_csr_get (cpu, LM32_CSR_IE) & 1) && (im_and_ip_result != 0))
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{
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/* Save PC in exception address register. */
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lm32bf_h_gr_set (cpu, 30, lm32bf_h_pc_get (cpu));
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/* Restart at interrupt offset in handler exception table. */
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lm32bf_h_pc_set (cpu,
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lm32bf_h_csr_get (cpu,
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LM32_CSR_EBA) +
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LM32_EID_INTERRUPT * 32);
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/* Save interrupt enable and then clear. */
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lm32bf_h_csr_set (cpu, LM32_CSR_IE, 0x2);
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}
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/* reschedule soon. */
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if (controller->event != NULL)
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hw_event_queue_deschedule (me, controller->event);
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controller->event = NULL;
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/* if there are external interrupts, schedule an interrupt-check again.
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* NOTE: THIS MAKES IT VERY INEFFICIENT. INSTEAD, TRIGGER THIS
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* CHECk_EVENT WHEN THE USER ENABLES IE OR USER MODIFIES IM REGISTERS.
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*/
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if (s_ui_ExtIntrs != 0)
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controller->event =
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hw_event_queue_schedule (me, 1, deliver_lm32cpu_interrupt, data);
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}
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/* Handle an event on one of the CPU's ports. */
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static void
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lm32cpu_port_event (struct hw *me,
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int my_port,
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struct hw *source, int source_port, int level)
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{
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struct lm32cpu *controller = hw_data (me);
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SIM_DESC sd = hw_system (me);
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sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
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address_word cia = CPU_PC_GET (cpu);
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HW_TRACE ((me, "interrupt event on port %d, level %d", my_port, level));
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/*
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* Activate IP if the interrupt's activated; don't do anything if
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* the interrupt's deactivated.
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*/
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if (level == 1)
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{
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/*
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* save state of external interrupt.
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*/
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s_ui_ExtIntrs |= (1 << my_port);
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/* interrupt-activated so set IP. */
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lm32bf_h_csr_set (cpu, LM32_CSR_IP,
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lm32bf_h_csr_get (cpu, LM32_CSR_IP) | (1 << my_port));
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/*
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* Since interrupt is activated, queue an immediate event
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* to check if this interrupt is serviceable.
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*/
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if (controller->event != NULL)
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hw_event_queue_deschedule (me, controller->event);
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/*
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* Queue an immediate event to check if this interrupt must be serviced;
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* this will happen after the current instruction is complete.
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*/
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controller->event = hw_event_queue_schedule (me,
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0,
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deliver_lm32cpu_interrupt,
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0);
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}
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else
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{
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/*
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* save state of external interrupt.
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*/
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s_ui_ExtIntrs &= ~(1 << my_port);
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}
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}
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const struct hw_descriptor dv_lm32cpu_descriptor[] = {
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{"lm32cpu", lm32cpu_finish,},
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{NULL},
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};
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