2bfa91eece
Committed by Elena Zannoni <ezannoni@cygnus.com> * sh-tdep.c (sh_skip_prologue): Change prologue matching for modern compilers. (sh_frame_find_saved_regs): Ditto. (sh_find_callers_reg): Stop if pc is zero.
799 lines
23 KiB
C
799 lines
23 KiB
C
/* Target-dependent code for Hitachi Super-H, for GDB.
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000 Free Software
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Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/*
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Contributed by Steve Chamberlain
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sac@cygnus.com
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*/
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#include "defs.h"
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#include "frame.h"
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#include "obstack.h"
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#include "symtab.h"
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#include "symfile.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "value.h"
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#include "dis-asm.h"
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#include "inferior.h" /* for BEFORE_TEXT_END etc. */
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#include "gdb_string.h"
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#include "arch-utils.h"
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/* A set of original names, to be used when restoring back to generic
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registers from a specific set. */
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/* *INDENT-OFF* */
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static char *sh_generic_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"fpul", "fpscr",
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"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
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"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
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"ssr", "spc",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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};
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static char *sh_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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static char *sh3_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"ssr", "spc",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
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};
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static char *sh3e_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"fpul", "fpscr",
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"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
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"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
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"ssr", "spc",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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};
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static char *sh_dsp_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"", "dsr",
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"a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
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"y0", "y1", "", "", "", "", "", "mod",
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"", "",
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"rs", "re", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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};
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static char *sh3_dsp_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"", "dsr",
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"a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
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"y0", "y1", "", "", "", "", "", "mod",
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"ssr", "spc",
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"rs", "re", "", "", "", "", "", "",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
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};
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/* *INDENT-ON* */
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#ifdef _WIN32_WCE
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char **sh_register_names = sh3_reg_names;
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#else
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char **sh_register_names = sh_generic_reg_names;
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#endif
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struct
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{
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char **regnames;
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int mach;
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}
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sh_processor_type_table[] =
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{
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{
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sh_reg_names, bfd_mach_sh
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}
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,
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{
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sh_reg_names, bfd_mach_sh2
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}
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,
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{
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sh_dsp_reg_names, bfd_mach_sh_dsp
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}
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,
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{
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sh3_reg_names, bfd_mach_sh3
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}
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,
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{
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sh3_dsp_reg_names, bfd_mach_sh3_dsp
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}
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,
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{
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sh3e_reg_names, bfd_mach_sh3e
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}
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,
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{
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NULL, 0
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}
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};
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/* Prologue looks like
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[mov.l <regs>,@-r15]...
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[sts.l pr,@-r15]
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[mov.l r14,@-r15]
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[mov r15,r14]
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*/
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#define IS_STS(x) ((x) == 0x4f22)
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#define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
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#define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
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#define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
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#define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
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#define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
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#define IS_SHLL_R3(x) ((x) == 0x4300)
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#define IS_ADD_R3SP(x) ((x) == 0x3f3c)
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#define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b)
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#define FPSCR_SZ (1 << 20)
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/* Should call_function allocate stack space for a struct return? */
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int
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sh_use_struct_convention (gcc_p, type)
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int gcc_p;
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struct type *type;
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{
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return (TYPE_LENGTH (type) > 1);
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}
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/* Skip any prologue before the guts of a function */
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CORE_ADDR
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sh_skip_prologue (start_pc)
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CORE_ADDR start_pc;
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{
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CORE_ADDR here, end;
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if (!start_pc)
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return 0;
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for (here = start_pc, end = start_pc + (2 * 28); here < end;)
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{
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int w = read_memory_integer (here, 2);
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here += 2;
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if (IS_FMOV (w) || IS_PUSH (w) || IS_STS (w) || IS_MOV_R3 (w)
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|| IS_ADD_R3SP (w) || IS_ADD_SP (w) || IS_SHLL_R3 (w))
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start_pc = here;
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if (IS_MOV_SP_FP (w))
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{
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start_pc = here;
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break;
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}
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}
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return start_pc;
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}
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/* Disassemble an instruction. */
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int
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gdb_print_insn_sh (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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return print_insn_sh (memaddr, info);
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else
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return print_insn_shl (memaddr, info);
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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For us, the frame address is its stack pointer value, so we look up
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the function prologue to determine the caller's sp value, and return it. */
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CORE_ADDR
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sh_frame_chain (frame)
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struct frame_info *frame;
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{
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if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
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return frame->frame; /* dummy frame same as caller's frame */
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if (frame->pc && !inside_entry_file (frame->pc))
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return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
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else
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return 0;
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}
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/* Find REGNUM on the stack. Otherwise, it's in an active register. One thing
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we might want to do here is to check REGNUM against the clobber mask, and
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somehow flag it as invalid if it isn't saved on the stack somewhere. This
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would provide a graceful failure mode when trying to get the value of
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caller-saves registers for an inner frame. */
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CORE_ADDR
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sh_find_callers_reg (fi, regnum)
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struct frame_info *fi;
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int regnum;
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{
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struct frame_saved_regs fsr;
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for (; fi; fi = fi->next)
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if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
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/* When the caller requests PR from the dummy frame, we return PC because
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that's where the previous routine appears to have done a call from. */
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return generic_read_register_dummy (fi->pc, fi->frame, regnum);
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else
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{
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FRAME_FIND_SAVED_REGS (fi, fsr);
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if (!fi->pc)
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return 0;
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if (fsr.regs[regnum] != 0)
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return read_memory_integer (fsr.regs[regnum],
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REGISTER_RAW_SIZE (regnum));
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}
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return read_register (regnum);
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}
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/* Put here the code to store, into a struct frame_saved_regs, the
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addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special: the address we
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return for it IS the sp for the next frame. */
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void
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sh_frame_find_saved_regs (fi, fsr)
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struct frame_info *fi;
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struct frame_saved_regs *fsr;
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{
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int where[NUM_REGS];
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int rn;
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int have_fp = 0;
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int depth;
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int pc;
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int opc;
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int insn;
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int r3_val = 0;
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char *dummy_regs = generic_find_dummy_frame (fi->pc, fi->frame);
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if (dummy_regs)
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{
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/* DANGER! This is ONLY going to work if the char buffer format of
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the saved registers is byte-for-byte identical to the
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CORE_ADDR regs[NUM_REGS] format used by struct frame_saved_regs! */
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memcpy (&fsr->regs, dummy_regs, sizeof (fsr));
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return;
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}
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fi->leaf_function = 1;
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fi->f_offset = 0;
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for (rn = 0; rn < NUM_REGS; rn++)
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where[rn] = -1;
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depth = 0;
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/* Loop around examining the prologue insns until we find something
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that does not appear to be part of the prologue. But give up
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after 20 of them, since we're getting silly then. */
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pc = get_pc_function_start (fi->pc);
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if (!pc)
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{
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fi->pc = 0;
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return;
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}
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for (opc = pc + (2 * 28); pc < opc; pc += 2)
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{
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insn = read_memory_integer (pc, 2);
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/* See where the registers will be saved to */
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if (IS_PUSH (insn))
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{
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rn = GET_PUSHED_REG (insn);
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where[rn] = depth;
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depth += 4;
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}
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else if (IS_STS (insn))
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{
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where[PR_REGNUM] = depth;
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/* If we're storing the pr then this isn't a leaf */
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fi->leaf_function = 0;
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depth += 4;
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}
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else if (IS_MOV_R3 (insn))
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{
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r3_val = ((insn & 0xff) ^ 0x80) - 0x80;
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}
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else if (IS_SHLL_R3 (insn))
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{
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r3_val <<= 1;
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}
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else if (IS_ADD_R3SP (insn))
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{
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depth += -r3_val;
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}
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else if (IS_ADD_SP (insn))
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{
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depth -= ((insn & 0xff) ^ 0x80) - 0x80;
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}
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else if (IS_FMOV (insn))
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{
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if (read_register (FPSCR_REGNUM) & FPSCR_SZ)
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{
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depth += 8;
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}
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else
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{
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depth += 4;
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}
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}
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else if (IS_MOV_SP_FP (insn))
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break;
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#if 0 /* This used to just stop when it found an instruction that
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was not considered part of the prologue. Now, we just
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keep going looking for likely instructions. */
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else
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break;
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#endif
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}
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/* Now we know how deep things are, we can work out their addresses */
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for (rn = 0; rn < NUM_REGS; rn++)
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{
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if (where[rn] >= 0)
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{
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if (rn == FP_REGNUM)
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have_fp = 1;
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fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
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}
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else
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{
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fsr->regs[rn] = 0;
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}
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}
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if (have_fp)
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{
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fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
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}
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else
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{
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fsr->regs[SP_REGNUM] = fi->frame - 4;
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}
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fi->f_offset = depth - where[FP_REGNUM] - 4;
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/* Work out the return pc - either from the saved pr or the pr
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value */
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}
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/* initialize the extra info saved in a FRAME */
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void
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sh_init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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struct frame_info *fi;
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{
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struct frame_saved_regs fsr;
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if (fi->next)
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fi->pc = FRAME_SAVED_PC (fi->next);
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if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
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{
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/* We need to setup fi->frame here because run_stack_dummy gets it wrong
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by assuming it's always FP. */
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fi->frame = generic_read_register_dummy (fi->pc, fi->frame,
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SP_REGNUM);
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fi->return_pc = generic_read_register_dummy (fi->pc, fi->frame,
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PC_REGNUM);
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fi->f_offset = -(CALL_DUMMY_LENGTH + 4);
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fi->leaf_function = 0;
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return;
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}
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else
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{
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FRAME_FIND_SAVED_REGS (fi, fsr);
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fi->return_pc = sh_find_callers_reg (fi, PR_REGNUM);
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}
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}
|
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|
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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void
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sh_pop_frame ()
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{
|
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register struct frame_info *frame = get_current_frame ();
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register CORE_ADDR fp;
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register int regnum;
|
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struct frame_saved_regs fsr;
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|
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if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
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generic_pop_dummy_frame ();
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else
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{
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fp = FRAME_FP (frame);
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get_frame_saved_regs (frame, &fsr);
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|
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/* Copy regs from where they were saved in the frame */
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for (regnum = 0; regnum < NUM_REGS; regnum++)
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if (fsr.regs[regnum])
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write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
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write_register (PC_REGNUM, frame->return_pc);
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write_register (SP_REGNUM, fp + 4);
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}
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flush_cached_frames ();
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}
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|
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/* Function: push_arguments
|
|
Setup the function arguments for calling a function in the inferior.
|
|
|
|
On the Hitachi SH architecture, there are four registers (R4 to R7)
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which are dedicated for passing function arguments. Up to the first
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four arguments (depending on size) may go into these registers.
|
|
The rest go on the stack.
|
|
|
|
Arguments that are smaller than 4 bytes will still take up a whole
|
|
register or a whole 32-bit word on the stack, and will be
|
|
right-justified in the register or the stack word. This includes
|
|
chars, shorts, and small aggregate types.
|
|
|
|
Arguments that are larger than 4 bytes may be split between two or
|
|
more registers. If there are not enough registers free, an argument
|
|
may be passed partly in a register (or registers), and partly on the
|
|
stack. This includes doubles, long longs, and larger aggregates.
|
|
As far as I know, there is no upper limit to the size of aggregates
|
|
that will be passed in this way; in other words, the convention of
|
|
passing a pointer to a large aggregate instead of a copy is not used.
|
|
|
|
An exceptional case exists for struct arguments (and possibly other
|
|
aggregates such as arrays) if the size is larger than 4 bytes but
|
|
not a multiple of 4 bytes. In this case the argument is never split
|
|
between the registers and the stack, but instead is copied in its
|
|
entirety onto the stack, AND also copied into as many registers as
|
|
there is room for. In other words, space in registers permitting,
|
|
two copies of the same argument are passed in. As far as I can tell,
|
|
only the one on the stack is used, although that may be a function
|
|
of the level of compiler optimization. I suspect this is a compiler
|
|
bug. Arguments of these odd sizes are left-justified within the
|
|
word (as opposed to arguments smaller than 4 bytes, which are
|
|
right-justified).
|
|
|
|
|
|
If the function is to return an aggregate type such as a struct, it
|
|
is either returned in the normal return value register R0 (if its
|
|
size is no greater than one byte), or else the caller must allocate
|
|
space into which the callee will copy the return value (if the size
|
|
is greater than one byte). In this case, a pointer to the return
|
|
value location is passed into the callee in register R2, which does
|
|
not displace any of the other arguments passed in via registers R4
|
|
to R7. */
|
|
|
|
CORE_ADDR
|
|
sh_push_arguments (nargs, args, sp, struct_return, struct_addr)
|
|
int nargs;
|
|
value_ptr *args;
|
|
CORE_ADDR sp;
|
|
unsigned char struct_return;
|
|
CORE_ADDR struct_addr;
|
|
{
|
|
int stack_offset, stack_alloc;
|
|
int argreg;
|
|
int argnum;
|
|
struct type *type;
|
|
CORE_ADDR regval;
|
|
char *val;
|
|
char valbuf[4];
|
|
int len;
|
|
int odd_sized_struct;
|
|
|
|
/* first force sp to a 4-byte alignment */
|
|
sp = sp & ~3;
|
|
|
|
/* The "struct return pointer" pseudo-argument has its own dedicated
|
|
register */
|
|
if (struct_return)
|
|
write_register (STRUCT_RETURN_REGNUM, struct_addr);
|
|
|
|
/* Now make sure there's space on the stack */
|
|
for (argnum = 0, stack_alloc = 0;
|
|
argnum < nargs; argnum++)
|
|
stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3);
|
|
sp -= stack_alloc; /* make room on stack for args */
|
|
|
|
|
|
/* Now load as many as possible of the first arguments into
|
|
registers, and push the rest onto the stack. There are 16 bytes
|
|
in four registers available. Loop thru args from first to last. */
|
|
|
|
argreg = ARG0_REGNUM;
|
|
for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++)
|
|
{
|
|
type = VALUE_TYPE (args[argnum]);
|
|
len = TYPE_LENGTH (type);
|
|
memset (valbuf, 0, sizeof (valbuf));
|
|
if (len < 4)
|
|
{ /* value gets right-justified in the register or stack word */
|
|
memcpy (valbuf + (4 - len),
|
|
(char *) VALUE_CONTENTS (args[argnum]), len);
|
|
val = valbuf;
|
|
}
|
|
else
|
|
val = (char *) VALUE_CONTENTS (args[argnum]);
|
|
|
|
if (len > 4 && (len & 3) != 0)
|
|
odd_sized_struct = 1; /* such structs go entirely on stack */
|
|
else
|
|
odd_sized_struct = 0;
|
|
while (len > 0)
|
|
{
|
|
if (argreg > ARGLAST_REGNUM || odd_sized_struct)
|
|
{ /* must go on the stack */
|
|
write_memory (sp + stack_offset, val, 4);
|
|
stack_offset += 4;
|
|
}
|
|
/* NOTE WELL!!!!! This is not an "else if" clause!!!
|
|
That's because some *&^%$ things get passed on the stack
|
|
AND in the registers! */
|
|
if (argreg <= ARGLAST_REGNUM)
|
|
{ /* there's room in a register */
|
|
regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
|
|
write_register (argreg++, regval);
|
|
}
|
|
/* Store the value 4 bytes at a time. This means that things
|
|
larger than 4 bytes may go partly in registers and partly
|
|
on the stack. */
|
|
len -= REGISTER_RAW_SIZE (argreg);
|
|
val += REGISTER_RAW_SIZE (argreg);
|
|
}
|
|
}
|
|
return sp;
|
|
}
|
|
|
|
/* Function: push_return_address (pc)
|
|
Set up the return address for the inferior function call.
|
|
Needed for targets where we don't actually execute a JSR/BSR instruction */
|
|
|
|
CORE_ADDR
|
|
sh_push_return_address (pc, sp)
|
|
CORE_ADDR pc;
|
|
CORE_ADDR sp;
|
|
{
|
|
write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
|
|
return sp;
|
|
}
|
|
|
|
/* Function: fix_call_dummy
|
|
Poke the callee function's address into the destination part of
|
|
the CALL_DUMMY. The address is actually stored in a data word
|
|
following the actualy CALL_DUMMY instructions, which will load
|
|
it into a register using PC-relative addressing. This function
|
|
expects the CALL_DUMMY to look like this:
|
|
|
|
mov.w @(2,PC), R8
|
|
jsr @R8
|
|
nop
|
|
trap
|
|
<destination>
|
|
*/
|
|
|
|
#if 0
|
|
void
|
|
sh_fix_call_dummy (dummy, pc, fun, nargs, args, type, gcc_p)
|
|
char *dummy;
|
|
CORE_ADDR pc;
|
|
CORE_ADDR fun;
|
|
int nargs;
|
|
value_ptr *args;
|
|
struct type *type;
|
|
int gcc_p;
|
|
{
|
|
*(unsigned long *) (dummy + 8) = fun;
|
|
}
|
|
#endif
|
|
|
|
|
|
/* Modify the actual processor type. */
|
|
|
|
int
|
|
sh_target_architecture_hook (ap)
|
|
const bfd_arch_info_type *ap;
|
|
{
|
|
int i, j;
|
|
|
|
if (ap->arch != bfd_arch_sh)
|
|
return 0;
|
|
|
|
for (i = 0; sh_processor_type_table[i].regnames != NULL; i++)
|
|
{
|
|
if (sh_processor_type_table[i].mach == ap->mach)
|
|
{
|
|
sh_register_names = sh_processor_type_table[i].regnames;
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
internal_error ("Architecture `%s' unreconized", ap->printable_name);
|
|
}
|
|
|
|
/* Print the registers in a form similar to the E7000 */
|
|
|
|
static void
|
|
sh_show_regs (args, from_tty)
|
|
char *args;
|
|
int from_tty;
|
|
{
|
|
int cpu;
|
|
if (TARGET_ARCHITECTURE->arch == bfd_arch_sh)
|
|
cpu = TARGET_ARCHITECTURE->mach;
|
|
else
|
|
cpu = 0;
|
|
|
|
printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
|
|
paddr (read_register (PC_REGNUM)),
|
|
(long) read_register (SR_REGNUM),
|
|
(long) read_register (PR_REGNUM),
|
|
(long) read_register (MACH_REGNUM),
|
|
(long) read_register (MACL_REGNUM));
|
|
|
|
printf_filtered ("GBR=%08lx VBR=%08lx",
|
|
(long) read_register (GBR_REGNUM),
|
|
(long) read_register (VBR_REGNUM));
|
|
if (cpu == bfd_mach_sh3 || cpu == bfd_mach_sh3e || cpu == bfd_mach_sh3_dsp
|
|
|| cpu == bfd_mach_sh4)
|
|
{
|
|
printf_filtered (" SSR=%08lx SPC=%08lx",
|
|
(long) read_register (SSR_REGNUM),
|
|
(long) read_register (SPC_REGNUM));
|
|
if (cpu == bfd_mach_sh3e || cpu == bfd_mach_sh4)
|
|
{
|
|
printf_filtered (" FPUL=%08lx FPSCR=%08lx",
|
|
(long) read_register (FPUL_REGNUM),
|
|
(long) read_register (FPSCR_REGNUM));
|
|
}
|
|
}
|
|
if (cpu == bfd_mach_sh_dsp || cpu == bfd_mach_sh3_dsp)
|
|
printf_filtered (" DSR=%08lx", (long) read_register (DSR_REGNUM));
|
|
|
|
printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
|
(long) read_register (0),
|
|
(long) read_register (1),
|
|
(long) read_register (2),
|
|
(long) read_register (3),
|
|
(long) read_register (4),
|
|
(long) read_register (5),
|
|
(long) read_register (6),
|
|
(long) read_register (7));
|
|
printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
|
|
(long) read_register (8),
|
|
(long) read_register (9),
|
|
(long) read_register (10),
|
|
(long) read_register (11),
|
|
(long) read_register (12),
|
|
(long) read_register (13),
|
|
(long) read_register (14),
|
|
(long) read_register (15));
|
|
if (cpu == bfd_mach_sh3e || cpu == bfd_mach_sh4)
|
|
{
|
|
int pr = cpu == bfd_mach_sh4 && (read_register (FPSCR_REGNUM) & 0x80000);
|
|
|
|
printf_filtered ((pr
|
|
? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
|
|
: "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
|
|
(long) read_register (FP0_REGNUM + 0),
|
|
(long) read_register (FP0_REGNUM + 1),
|
|
(long) read_register (FP0_REGNUM + 2),
|
|
(long) read_register (FP0_REGNUM + 3),
|
|
(long) read_register (FP0_REGNUM + 4),
|
|
(long) read_register (FP0_REGNUM + 5),
|
|
(long) read_register (FP0_REGNUM + 6),
|
|
(long) read_register (FP0_REGNUM + 7));
|
|
printf_filtered ((pr
|
|
? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
|
|
: "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
|
|
(long) read_register (FP0_REGNUM + 8),
|
|
(long) read_register (FP0_REGNUM + 9),
|
|
(long) read_register (FP0_REGNUM + 10),
|
|
(long) read_register (FP0_REGNUM + 11),
|
|
(long) read_register (FP0_REGNUM + 12),
|
|
(long) read_register (FP0_REGNUM + 13),
|
|
(long) read_register (FP0_REGNUM + 14),
|
|
(long) read_register (FP0_REGNUM + 15));
|
|
}
|
|
/* FIXME: sh4 has more registers */
|
|
if (cpu == bfd_mach_sh_dsp || cpu == bfd_mach_sh3_dsp)
|
|
{
|
|
printf_filtered ("A0G=%02lx A0=%08lx M0=%08lx X0=%08lx Y0=%08lx RS=%08lx MOD=%08lx\n",
|
|
(long) read_register (A0G_REGNUM) & 0xff,
|
|
(long) read_register (A0_REGNUM),
|
|
(long) read_register (M0_REGNUM),
|
|
(long) read_register (X0_REGNUM),
|
|
(long) read_register (Y0_REGNUM),
|
|
(long) read_register (RS_REGNUM),
|
|
(long) read_register (MOD_REGNUM));
|
|
printf_filtered ("A1G=%02lx A1=%08lx M1=%08lx X1=%08lx Y1=%08lx RE=%08lx\n",
|
|
(long) read_register (A1G_REGNUM) & 0xff,
|
|
(long) read_register (A1_REGNUM),
|
|
(long) read_register (M1_REGNUM),
|
|
(long) read_register (X1_REGNUM),
|
|
(long) read_register (Y1_REGNUM),
|
|
(long) read_register (RE_REGNUM));
|
|
}
|
|
}
|
|
|
|
/* Function: extract_return_value
|
|
Find a function's return value in the appropriate registers (in regbuf),
|
|
and copy it into valbuf. */
|
|
|
|
void
|
|
sh_extract_return_value (type, regbuf, valbuf)
|
|
struct type *type;
|
|
void *regbuf;
|
|
void *valbuf;
|
|
{
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
if (len <= 4)
|
|
memcpy (valbuf, ((char *) regbuf) + 4 - len, len);
|
|
else if (len <= 8)
|
|
memcpy (valbuf, ((char *) regbuf) + 8 - len, len);
|
|
else
|
|
error ("bad size for return value");
|
|
}
|
|
|
|
void
|
|
_initialize_sh_tdep ()
|
|
{
|
|
struct cmd_list_element *c;
|
|
|
|
tm_print_insn = gdb_print_insn_sh;
|
|
|
|
target_architecture_hook = sh_target_architecture_hook;
|
|
|
|
add_com ("regs", class_vars, sh_show_regs, "Print all registers");
|
|
}
|