97d3151a59
defined, define as 0. (FIX_CALL_DUMMY): Rewrite to remove presumption that host and target are similar. * config/mips/tm-idt.h (TARGET_BYTE_ORDER_SELECTABLE): Define. * config/mips/tm-idtl.h (TARGET_BYTE_ORDER_SELECTABLE): Define. * config/mips/tm-idt64.h (TARGET_BYTE_ORDER_SELECTABLE): Define. (BREAKPOINT): Remove definition. * config/mips/tm-idtl64.h (TARGET_BYTE_ORDER_SELECTABLE): Define. (BREAKPOINT): Remove definition. * config/mips/tm-mips64.h (GDB_TARGET_IS_MIPS64): Define with a value of 1, rather than without a value. * config/mips/tm-bigmips64.h (GDB_TARGET_IS_MIPS64): Likewise.
35 lines
1.2 KiB
C
35 lines
1.2 KiB
C
/* Target machine parameters for MIPS r4000
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Copyright 1994 Free Software Foundation, Inc.
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Contributed by Ian Lance Taylor (ian@cygnus.com)
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#define GDB_TARGET_IS_MIPS64 1
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/* force LONGEST to be long long in gdb */
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#define FORCE_LONG_LONG
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/* Use eight byte registers. */
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#define MIPS_REGSIZE 8
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/* Load double words in CALL_DUMMY. */
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#define OP_LDFPR 065 /* ldc1 */
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#define OP_LDGPR 067 /* ld */
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/* Get the basic MIPS definitions. Default to big endian, since that
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is how the chips are mostly used. */
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#include "tm-bigmips.h"
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