2de70689ff
* bfd/bfd-in2.h (bfd_elf32_arm_set_target_relocs): Likewise. * bfd/elf32-arm.c (elf32_arm_link_hash_table): New field. (elf232_arm_link_hash_table_create): Initialise new field. (check_use_blx): Change test depending on fix_arm1176. (bfd_elf32_arm_set_target_relocs): Set fix_arm1176 from command line options. * ld/emultempl/armelf.em (fix_arm1176): New variable. (arm_elf_create_output_section_statements): Pass fix_arm1176 option to bfd backend. (OPTION_FIX_ARM1176): New define. (OPTION_NO_FIX_ARM1176): Likewise. (PARSE_AND_LIST_LONGOPTS): Add new command line options. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Likewise. * ld/ld.texinfo: Document new command line options. * ld/testsuite/ld-arm/arm-elf.exp (armelftests): Update for new command-line options. (armeabitests): Update for new command-line options, and add new test cases. * ld/testsuite/ld-arm/fix-arm1176.s: Add test case. * ld/testsuite/ld-arm/fix-arm1176-off.d: Likewise. * ld/testsuite/ld-arm/fix-arm1176-on.d: Likewise.
20 lines
526 B
Makefile
20 lines
526 B
Makefile
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.+: file format elf32-littlearm
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Disassembly of section .foo:
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[0-9a-f]+ <_start>:
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[0-9a-f]+: f000 f800 bl 2001018 <__func_to_branch_to_veneer>
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[0-9a-f]+ <__func_to_branch_to_veneer>:
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[0-9a-f]+: 4778 bx pc
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[0-9a-f]+: 46c0 nop ; \(mov r8, r8\)
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[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 2001020 <__func_to_branch_to_veneer\+0x8>
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[0-9a-f]+: 00008000 .word 0x00008000
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[0-9a-f]+: 00000000 .word 0x00000000
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Disassembly of section .text:
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[0-9a-f]+ <func_to_branch_to>:
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[0-9a-f]+: e12fff1e bx lr
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