253 lines
5.4 KiB
C
253 lines
5.4 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CPU_H_
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#define _CPU_H_
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#include "basics.h"
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#include "registers.h"
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#include "device.h"
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#include "corefile.h"
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#include "vm.h"
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#include "events.h"
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#include "interrupts.h"
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#include "psim.h"
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#include "idecode.h"
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#include "itable.h"
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#include "os_emul.h"
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#include "mon.h"
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#include "model.h"
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#ifndef CONST_ATTRIBUTE
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#define CONST_ATTRIBUTE __attribute__((__const__))
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#endif
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/* typedef struct _cpu cpu;
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Declared in basics.h because it is used opaquely throughout the
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code */
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/* Create a cpu object */
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INLINE_CPU\
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(cpu *) cpu_create
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(psim *system,
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core *memory,
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cpu_mon *monitor,
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os_emul *cpu_emulation,
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int cpu_nr);
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INLINE_CPU\
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(void) cpu_init
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(cpu *processor);
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/* Find our way home */
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INLINE_CPU\
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(psim *) cpu_system
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(cpu *processor) CONST_ATTRIBUTE;
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INLINE_CPU\
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(cpu_mon *) cpu_monitor
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(cpu *processor) CONST_ATTRIBUTE;
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INLINE_CPU\
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(os_emul *) cpu_os_emulation
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(cpu *processor);
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INLINE_CPU\
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(int) cpu_nr
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(cpu *processor) CONST_ATTRIBUTE;
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/* manipulate the processors program counter and execution state.
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The program counter is not included in the register file. Instead
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it is extracted and then later restored (set, reset, halt). This
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is to give the user of the cpu (and the compiler) the chance to
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minimize the need to load/store the cpu's PC value. (Especially in
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the case of a single processor) */
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INLINE_CPU\
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(void) cpu_set_program_counter
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(cpu *processor,
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unsigned_word new_program_counter);
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INLINE_CPU\
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(unsigned_word) cpu_get_program_counter
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(cpu *processor);
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INLINE_CPU\
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(void) cpu_restart
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(cpu *processor,
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unsigned_word nia);
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INLINE_CPU\
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(void) cpu_halt
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(cpu *processor,
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unsigned_word nia,
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stop_reason reason,
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int signal);
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EXTERN_CPU\
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(void) cpu_error
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(cpu *processor,
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unsigned_word cia,
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const char *fmt,
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...) __attribute__ ((format (printf, 3, 4)));
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/* The processors local concept of time */
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INLINE_CPU\
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(signed64) cpu_get_time_base
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(cpu *processor);
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INLINE_CPU\
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(void) cpu_set_time_base
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(cpu *processor,
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signed64 time_base);
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INLINE_CPU\
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(signed32) cpu_get_decrementer
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(cpu *processor);
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INLINE_CPU\
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(void) cpu_set_decrementer
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(cpu *processor,
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signed32 decrementer);
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#if WITH_IDECODE_CACHE_SIZE
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/* Return the cache entry that matches the given CIA. No guarentee
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that the cache entry actually contains the instruction for that
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address */
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INLINE_CPU\
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(idecode_cache) *cpu_icache_entry
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(cpu *processor,
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unsigned_word cia);
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INLINE_CPU\
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(void) cpu_flush_icache
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(cpu *processor);
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#endif
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/* reveal the processors VM:
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At first sight it may seem better to, instead of exposing the cpu's
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inner vm maps, to have the cpu its self provide memory manipulation
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functions. (eg cpu_instruction_fetch() cpu_data_read_4())
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Unfortunatly in addition to these functions is the need (for the
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debugger) to be able to read/write to memory in ways that violate
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the vm protection (eg store breakpoint instruction in the
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instruction map). */
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INLINE_CPU\
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(vm_data_map *) cpu_data_map
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(cpu *processor);
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INLINE_CPU\
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(vm_instruction_map *) cpu_instruction_map
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(cpu *processor);
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INLINE_CPU\
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(void) cpu_page_tlb_invalidate_entry
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(cpu *processor,
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unsigned_word ea);
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INLINE_CPU\
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(void) cpu_page_tlb_invalidate_all
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(cpu *processor);
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/* reveal the processors interrupt state */
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INLINE_CPU\
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(interrupts *) cpu_interrupts
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(cpu *processor);
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/* grant access to the reservation information */
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typedef struct _memory_reservation {
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int valid;
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unsigned_word addr;
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unsigned_word data;
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} memory_reservation;
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INLINE_CPU\
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(memory_reservation *) cpu_reservation
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(cpu *processor);
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/* Registers:
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This model exploits the PowerPC's requirement for a synchronization
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to occure after (or before) the update of any context controlling
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register. All context sync points must call the sync function
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below to when ever a synchronization point is reached */
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INLINE_CPU\
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(registers *) cpu_registers
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(cpu *processor) CONST_ATTRIBUTE;
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INLINE_CPU\
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(void) cpu_synchronize_context
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(cpu *processor,
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unsigned_word cia);
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#define IS_PROBLEM_STATE(PROCESSOR) \
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(CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
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? (cpu_registers(PROCESSOR)->msr & msr_problem_state) \
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: 1)
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#define IS_64BIT_MODE(PROCESSOR) \
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(WITH_TARGET_WORD_BITSIZE == 64 \
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? (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
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? (cpu_registers(PROCESSOR)->msr & msr_64bit_mode) \
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: 1) \
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: 0)
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#define IS_FP_AVAILABLE(PROCESSOR) \
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(CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
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? (cpu_registers(PROCESSOR)->msr & msr_floating_point_available) \
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: 1)
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INLINE_CPU\
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(void) cpu_print_info
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(cpu *processor,
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int verbose);
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INLINE_CPU\
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(model_data *) cpu_model
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(cpu *processor) CONST_ATTRIBUTE;
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#if (CPU_INLINE & INCLUDE_MODULE)
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# include "cpu.c"
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#endif
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#endif
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