old-cross-binutils/sim
Doug Evans 99c53aa9f6 * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
1998-12-04 08:22:27 +00:00
..
arm define SIM_HAVE_BIENDIAN 1998-09-14 16:58:00 +00:00
common * A few more improvements to gx jit prototype. 1998-12-01 13:28:53 +00:00
d10v Fix PR 17387: ignore auto increment for loads where the destination register 1998-09-30 17:15:14 +00:00
erc32
h8300
igen * gen-engine.c (print_run_body): Prefix instruction_address. 1998-12-04 04:45:05 +00:00
m32r * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. 1998-12-04 08:22:27 +00:00
m32r-gx * A few more improvements to gx jit prototype. 1998-12-01 13:28:53 +00:00
mips Fix --enable-build-warnings=-Werror failures. 1998-11-25 09:58:04 +00:00
mn10300 Regress yesterday's change to jmp instn implementation in mn10300.igen. 1998-08-26 13:37:56 +00:00
ppc Fix problem where qnan was treated like an infinity 1998-11-20 00:44:03 +00:00
sh
testsuite * Test case for PR 18364, over from d30v branch. 1998-12-04 04:17:08 +00:00
tic80 Unify (well almost) --enable-build-warnings configuration option 1998-10-28 02:01:32 +00:00
v850 Fix --enable-build-warnings=-Werror failures. 1998-11-25 09:58:04 +00:00
w65 Unify (well almost) --enable-build-warnings configuration option 1998-10-28 02:01:32 +00:00
.Sanitize * Personal prototype "gx" translation-based JIT engine for M32R. 1998-11-14 04:35:47 +00:00
ChangeLog Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com> 1998-11-05 20:25:22 +00:00
configure Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com> 1998-11-05 20:25:22 +00:00
configure.in * Personal prototype "gx" translation-based JIT engine for M32R. 1998-11-14 04:35:47 +00:00
Makefile.in
README-HACKING Add d10v and v850 to gennltvals.sh and regenerate. 1998-11-24 07:59:01 +00:00