438 lines
11 KiB
C
438 lines
11 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _SIM_CORE_C_
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#define _SIM_CORE_C_
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#include "sim-main.h"
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#include "sim-assert.h"
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/* "core" module install handler.
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This is called via sim_module_install to install the "core" subsystem
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into the simulator. */
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EXTERN_SIM_CORE\
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(SIM_RC)
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sim_core_install (SIM_DESC sd)
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{
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sim_module_add_uninstall_fn (sd, sim_core_uninstall);
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sim_module_add_init_fn (sd, sim_core_init);
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return SIM_RC_OK;
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}
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/* Uninstall the "core" subsystem from the simulator. */
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EXTERN_SIM_CORE\
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(void)
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sim_core_uninstall (SIM_DESC sd)
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{
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/* FIXME: free buffers, etc. */
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}
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EXTERN_SIM_CORE\
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(SIM_RC)
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sim_core_init (SIM_DESC sd)
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{
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sim_core *memory = STATE_CORE(sd);
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sim_core_maps map;
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for (map = 0;
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map < nr_sim_core_maps;
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map++) {
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/* blow away old mappings */
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sim_core_mapping *curr = memory->map[map].first;
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while (curr != NULL) {
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sim_core_mapping *tbd = curr;
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curr = curr->next;
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if (tbd->free_buffer) {
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SIM_ASSERT(tbd->buffer != NULL);
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zfree(tbd->buffer);
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}
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zfree(tbd);
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}
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memory->map[map].first = NULL;
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}
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return SIM_RC_OK;
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}
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STATIC_INLINE_SIM_CORE\
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(const char *)
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sim_core_map_to_str (sim_core_maps map)
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{
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switch (map)
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{
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case sim_core_read_map: return "read";
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case sim_core_write_map: return "write";
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case sim_core_execute_map: return "exec";
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default: return "(invalid-map)";
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}
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}
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STATIC_INLINE_SIM_CORE\
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(sim_core_mapping *)
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new_sim_core_mapping(SIM_DESC sd,
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attach_type attach,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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device *device,
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void *buffer,
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int free_buffer)
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{
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sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
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/* common */
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new_mapping->level = attach;
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new_mapping->space = space;
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new_mapping->base = addr;
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new_mapping->nr_bytes = nr_bytes;
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new_mapping->bound = addr + (nr_bytes - 1);
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if (attach == attach_raw_memory) {
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new_mapping->buffer = buffer;
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new_mapping->free_buffer = free_buffer;
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}
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else if (attach >= attach_callback) {
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new_mapping->device = device;
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}
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else {
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sim_io_error (sd, "new_sim_core_mapping - internal error - unknown attach type %d\n",
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attach);
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}
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return new_mapping;
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}
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STATIC_INLINE_SIM_CORE\
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(void)
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sim_core_map_attach(SIM_DESC sd,
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sim_core_map *access_map,
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attach_type attach,
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int space,
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unsigned_word addr,
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unsigned nr_bytes, /* host limited */
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device *client, /*callback/default*/
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void *buffer, /*raw_memory*/
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int free_buffer) /*raw_memory*/
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{
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/* find the insertion point for this additional mapping and then
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insert */
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sim_core_mapping *next_mapping;
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sim_core_mapping **last_mapping;
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SIM_ASSERT((attach >= attach_callback && client != NULL && buffer == NULL && !free_buffer)
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|| (attach == attach_raw_memory && client == NULL && buffer != NULL));
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/* actually do occasionally get a zero size map */
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if (nr_bytes == 0) {
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#if (WITH_DEVICES)
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device_error(client, "called on sim_core_map_attach with size zero");
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#else
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sim_io_error (sd, "called on sim_core_map_attach with size zero");
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#endif
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}
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/* find the insertion point (between last/next) */
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next_mapping = access_map->first;
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last_mapping = &access_map->first;
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while(next_mapping != NULL
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&& (next_mapping->level < attach
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|| (next_mapping->level == attach
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&& next_mapping->bound < addr))) {
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/* provided levels are the same */
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/* assert: next_mapping->base > all bases before next_mapping */
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/* assert: next_mapping->bound >= all bounds before next_mapping */
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last_mapping = &next_mapping->next;
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next_mapping = next_mapping->next;
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}
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/* check insertion point correct */
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SIM_ASSERT(next_mapping == NULL || next_mapping->level >= attach);
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if (next_mapping != NULL && next_mapping->level == attach
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&& next_mapping->base < (addr + (nr_bytes - 1))) {
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#if (WITH_DEVICES)
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device_error(client, "map overlap when attaching %d:0x%lx (%ld)",
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space, (long)addr, (long)nr_bytes);
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#else
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sim_io_error (sd, "map overlap when attaching %d:0x%lx (%ld)",
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space, (long)addr, (long)nr_bytes);
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#endif
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}
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/* create/insert the new mapping */
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*last_mapping = new_sim_core_mapping(sd,
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attach,
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space, addr, nr_bytes,
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client, buffer, free_buffer);
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(*last_mapping)->next = next_mapping;
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}
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INLINE_SIM_CORE\
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(void)
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sim_core_attach(SIM_DESC sd,
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sim_cpu *cpu,
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attach_type attach,
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access_type access,
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int space,
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unsigned_word addr,
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unsigned nr_bytes, /* host limited */
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device *client,
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void *optional_buffer)
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{
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sim_core *memory = STATE_CORE(sd);
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sim_core_maps map;
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void *buffer;
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int buffer_freed;
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int i;
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/* check for for attempt to use unimplemented per-processor core map */
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if (cpu != NULL)
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sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
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if ((access & access_read_write_exec) == 0
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|| (access & ~access_read_write_exec) != 0) {
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#if (WITH_DEVICES)
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device_error(client, "invalid access for core attach");
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#else
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sim_io_error (sd, "invalid access for core attach");
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#endif
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}
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/* verify the attach type */
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if (attach == attach_raw_memory) {
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if (optional_buffer == NULL) {
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buffer = zalloc(nr_bytes);
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buffer_freed = 0;
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}
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else {
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buffer = optional_buffer;
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buffer_freed = 1;
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}
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}
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else if (attach >= attach_callback) {
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buffer = NULL;
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buffer_freed = 1;
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}
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else {
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#if (WITH_DEVICES)
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device_error(client, "sim_core_attach - conflicting buffer and attach arguments");
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#else
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sim_io_error (sd, "sim_core_attach - conflicting buffer and attach arguments");
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#endif
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buffer = NULL;
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buffer_freed = 1;
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}
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/* attach the region to all applicable access maps */
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for (map = 0;
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map < nr_sim_core_maps;
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map++) {
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switch (map) {
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case sim_core_read_map:
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if (access & access_read)
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sim_core_map_attach(sd, &memory->map[map],
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attach,
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space, addr, nr_bytes,
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client, buffer, !buffer_freed);
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buffer_freed ++;
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break;
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case sim_core_write_map:
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if (access & access_write)
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sim_core_map_attach(sd, &memory->map[map],
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attach,
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space, addr, nr_bytes,
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client, buffer, !buffer_freed);
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buffer_freed ++;
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break;
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case sim_core_execute_map:
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if (access & access_exec)
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sim_core_map_attach(sd, &memory->map[map],
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attach,
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space, addr, nr_bytes,
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client, buffer, !buffer_freed);
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buffer_freed ++;
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break;
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case nr_sim_core_maps:
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sim_io_error (sd, "sim_core_attach - internal error - bad switch");
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break;
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}
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}
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/* Just copy this map to each of the processor specific data structures.
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FIXME - later this will be replaced by true processor specific
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maps. */
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for (i = 0; i < MAX_NR_PROCESSORS; i++)
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*CPU_CORE (STATE_CPU (sd, i)) = *STATE_CORE (sd);
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}
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STATIC_INLINE_SIM_CORE\
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(sim_core_mapping *)
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sim_core_find_mapping(sim_core *core,
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sim_core_maps map,
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unsigned_word addr,
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unsigned nr_bytes,
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int abort, /*either 0 or 1 - hint to inline/-O */
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sim_cpu *cpu, /* abort => cpu != NULL */
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sim_cia cia)
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{
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sim_core_mapping *mapping = core->map[map].first;
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ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
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ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
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ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
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while (mapping != NULL)
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{
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if (addr >= mapping->base
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&& (addr + (nr_bytes - 1)) <= mapping->bound)
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return mapping;
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mapping = mapping->next;
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}
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if (abort)
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{
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if (cpu == NULL)
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sim_io_error (NULL, "sim_core_find_map - internal error - can not abort without a processor");
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else
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sim_io_error (CPU_STATE (cpu),
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"access to unmaped address 0x%lx (%d bytes)\n",
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(unsigned long) addr, nr_bytes);
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}
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return NULL;
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}
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STATIC_INLINE_SIM_CORE\
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(void *)
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sim_core_translate(sim_core_mapping *mapping,
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unsigned_word addr)
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{
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return (void *)(((char *)mapping->buffer) + addr - mapping->base);
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}
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INLINE_SIM_CORE\
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(unsigned)
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sim_core_read_buffer(SIM_DESC sd,
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sim_core_maps map,
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void *buffer,
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unsigned_word addr,
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unsigned len)
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{
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unsigned count = 0;
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while (count < len) {
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unsigned_word raddr = addr + count;
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sim_core_mapping *mapping =
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sim_core_find_mapping(STATE_CORE (sd), map,
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raddr, 1,
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0, NULL, NULL_CIA); /*dont-abort*/
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if (mapping == NULL)
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break;
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#if (WITH_DEVICES)
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if (mapping->device != NULL) {
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int nr_bytes = len - count;
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if (raddr + nr_bytes - 1> mapping->bound)
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nr_bytes = mapping->bound - raddr + 1;
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if (device_io_read_buffer(mapping->device,
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(unsigned_1*)buffer + count,
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mapping->space,
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raddr,
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nr_bytes) != nr_bytes)
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break;
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count += nr_bytes;
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}
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else
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#endif
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{
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((unsigned_1*)buffer)[count] =
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*(unsigned_1*)sim_core_translate(mapping, raddr);
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count += 1;
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}
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}
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return count;
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}
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INLINE_SIM_CORE\
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(unsigned)
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sim_core_write_buffer(SIM_DESC sd,
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sim_core_maps map,
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const void *buffer,
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unsigned_word addr,
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unsigned len)
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{
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unsigned count = 0;
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while (count < len) {
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unsigned_word raddr = addr + count;
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sim_core_mapping *mapping = sim_core_find_mapping(STATE_CORE (sd), map,
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raddr, 1,
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0, NULL, NULL_CIA); /*dont-abort*/
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if (mapping == NULL)
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break;
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#if (WITH_DEVICES)
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if (WITH_CALLBACK_MEMORY
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&& mapping->device != NULL) {
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int nr_bytes = len - count;
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if (raddr + nr_bytes - 1 > mapping->bound)
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nr_bytes = mapping->bound - raddr + 1;
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if (device_io_write_buffer(mapping->device,
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(unsigned_1*)buffer + count,
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mapping->space,
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raddr,
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nr_bytes) != nr_bytes)
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break;
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count += nr_bytes;
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}
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else
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#endif
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{
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*(unsigned_1*)sim_core_translate(mapping, raddr) =
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((unsigned_1*)buffer)[count];
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count += 1;
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}
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}
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return count;
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}
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/* define the read/write 1/2/4/8/word functions */
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#define N 1
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#include "sim-n-core.h"
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#undef N
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#define N 2
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#include "sim-n-core.h"
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#undef N
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#define N 4
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#include "sim-n-core.h"
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#undef N
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#define N 8
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#include "sim-n-core.h"
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#undef N
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#define N word
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#include "sim-n-core.h"
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#undef N
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#endif
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