old-cross-binutils/opcodes/ChangeLog
Bernd Schmidt 086134ec0e gas/testsuite/:
From Robin Getz  <rgetz@blackfin.uclinux.org>
	* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
	recent changes in opcodes/bfin-dis.c.
	gas/bfin/arithmetic.s: Likewise.
	gas/bfin/bit.d: Likewise.
	gas/bfin/bit2.d: Likewise.
	gas/bfin/control_code.d: Likewise.
	gas/bfin/control_code2.d: Likewise.
	gas/bfin/event.d: Likewise.
	gas/bfin/event2.d: Likewise.
	gas/bfin/flow.d: Likewise.
	gas/bfin/flow2.d: Likewise.
	gas/bfin/load.d: Likewise.
	gas/bfin/logical.d: Likewise.
	gas/bfin/logical2.d: Likewise.
	gas/bfin/move.d: Likewise.
	gas/bfin/move2.d: Likewise.
	gas/bfin/parallel.d: Likewise.
	gas/bfin/parallel2.d: Likewise.
	gas/bfin/parallel3.d: Likewise.
	gas/bfin/parallel4.d: Likewise.
	gas/bfin/shift.d: Likewise.
	gas/bfin/shift2.d: Likewise.
	gas/bfin/stack.d: Likewise.
	gas/bfin/stack2.d: Likewise.
	gas/bfin/store.d: Likewise.
	gas/bfin/vector.d: Likewise.
	gas/bfin/vector2.d: Likewise.
	gas/bfin/video.d: Likewise.
	gas/bfin/video2.d: Likewise.

opcodes/:
	* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
	c_imm32, c_huimm32e): Define.
	(constant_formats): Add flags for printing decimal, leading spaces, and
	exact symbols.
	(comment, parallel): Add global flags in all disassembly.
	(fmtconst): Take advantage of new flags, and print default in hex.
	(fmtconst_val): Likewise.
	(decode_macfunc): Be consistant with spaces, tabs, comments,
	capitalization in disassembly, fix minor coding style issues.
	(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
	(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
	decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
	decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
	decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
	decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
	decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
	decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
	decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
	_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-26 16:48:32 +00:00

415 lines
12 KiB
Text
Raw Blame History

This file contains invisible Unicode characters

This file contains invisible Unicode characters that are indistinguishable to humans but may be processed differently by a computer. If you think that this is intentional, you can safely ignore this warning. Use the Escape button to reveal them.

2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
From Jie Zhang <jie.zhang@analog.com>
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
c_imm32, c_huimm32e): Define.
(constant_formats): Add flags for printing decimal, leading spaces, and
exact symbols.
(comment, parallel): Add global flags in all disassembly.
(fmtconst): Take advantage of new flags, and print default in hex.
(fmtconst_val): Likewise.
(decode_macfunc): Be consistant with spaces, tabs, comments,
capitalization in disassembly, fix minor coding style issues.
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* aclocal.m4: Regenerate.
* configure: Likewise.
* Makefile.in: Likewise.
2008-03-13 Alan Modra <amodra@bigpond.net.au>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* configure: Regenerate.
2008-03-07 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c (powerpc_opcodes): Order and format.
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
* i386-tbl.h: Regenerated.
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Disallow 16-bit near indirect branches for
x86-64.
* i386-tbl.h: Regenerated.
2008-02-21 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
and Fword for far indirect jmp. Allow Reg16 and Word for near
indirect jmp on x86-64. Disallow Fword for lcall.
* i386-tbl.h: Re-generate.
2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
* cr16-opc.c (cr16_num_optab): Defined
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-14 Nick Clifton <nickc@redhat.com>
PR binutils/5524
* configure.in (SHARED_LIBADD): Select the correct host specific
file extension for shared libraries.
* configure: Regenerate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (a_mode): New.
(cond_jump_mode): Adjust.
(Ma): Change to a_mode.
(intel_operand_size): Handle a_mode.
* i386-opc.tbl: Allow Dword and Qword for bound.
* i386-tbl.h: Re-generate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flags): Add CpuXsave.
* i386-opc.h (CpuXsave): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpuxsave.
* i386-dis.c (MOD_0FAE_REG_4): New.
(RM_0F01_REG_2): Likewise.
(MOD_0FAE_REG_5): Updated.
(RM_0F01_REG_3): Likewise.
(reg_table): Use MOD_0FAE_REG_4.
(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
for xrstor.
(rm_table): Add RM_0F01_REG_2.
* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-02-11 Jan Beulich <jbeulich@novell.com>
* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
* i386-tbl.h: Re-generate.
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
PR 5715
* configure: Regenerated.
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c: Update copyright.
(mips_arch_choices): Add Octeon.
* mips-opc.c: Update copyright.
(IOCT): New macro.
(mips_builtin_opcodes): Add Octeon instruction synciobdma.
2008-01-29 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c: Support optional L form mtmsr.
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
2008-01-23 Tristan Gingold <gingold@adacore.com>
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
(cpu_flags): Likewise.
* i386-opc.h (CpuMMX2): Removed.
(CpuSSE): Updated.
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
CPU_SMX_FLAGS.
* i386-init.h: Regenerated.
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Use Qword on movddup.
* i386-tbl.h: Regenerated.
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
* i386-tbl.h: Regenerated.
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Mx): New.
(PREFIX_0FC3): Likewise.
(PREFIX_0FC7_REG_6): Updated.
(dis386_twobyte): Use PREFIX_0FC3.
(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
movntss.
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
(operand_types): Add Mem.
* i386-opc.h (IntelSyntax): New.
* i386-opc.h (Mem): New.
(Byte): Updated.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add intelsyntax.
(i386_operand_type): Add mem.
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
instructions.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (Byte): Fix a typo.
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
(REG_0F18): Updated.
(reg_table): Updated.
(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (set_bitfield): Use fail () on error.
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (lineno): New.
(filename): Likewise.
(set_bitfield): Report filename and line numer on error.
(process_i386_opcodes): Set filename and update lineno.
(process_i386_registers): Likewise.
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c: Update copyright to 2008.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
* i386-tbl.h: Regenerated.
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
* i386-opc.h (No_xSuf): Removed.
(CheckSize): Updated.
* i386-tbl.h: Regenerated.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
CPU_SSE5_FLAGS.
(cpu_flags): Add CpuSSE4_2_Or_ABM.
* i386-opc.h (CpuSSE4_2_Or_ABM): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpusse4_2_or_abm.
* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
CpuABM|CpuSSE4_2 on popcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h: Update comments.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 Mark Kettenis <kettenis@gnu.org>
* m88k-dis.c (instructions): Fix fcvt.* instructions.
From Miod Vallat.
For older changes see ChangeLog-2007
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End: