c9ee9c4cb8
* ld/testsuite/ld-arm/arm-elf.exp (armelftests): Only dump executable sections in group-relocs test. * ld/testsuite/ld-arm/reloc-boundaries.d: Fix test to work on Linux targets.
156 lines
4.2 KiB
ArmAsm
156 lines
4.2 KiB
ArmAsm
@ Tests for group relocations.
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@
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@ Beware when editing this file: it is carefully crafted so that
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@ specific PC- and SB-relative offsets arise.
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@
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@ Note that the gas tests have already checked that group relocations are
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@ handled in the same way for local and external symbols.
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@ We will place .text at 0x8000.
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.text
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.globl _start
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_start:
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@ ALU, PC-relative
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@ Instructions start at .text + 0x0
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add r0, r15, #:pc_g0:(one_group_needed_alu_pc)
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@ Instructions start at .text + 0x4
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add r0, r15, #:pc_g0_nc:(two_groups_needed_alu_pc)
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add r0, r0, #:pc_g1:(two_groups_needed_alu_pc + 4)
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@ Instructions start at .text + 0xc
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add r0, r15, #:pc_g0_nc:(three_groups_needed_alu_pc)
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add r0, r0, #:pc_g1_nc:(three_groups_needed_alu_pc + 4)
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add r0, r0, #:pc_g2:(three_groups_needed_alu_pc + 8)
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@ ALU, SB-relative
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add r0, r0, #:sb_g0:(one_group_needed_alu_sb)
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add r0, r15, #:sb_g0_nc:(two_groups_needed_alu_sb)
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add r0, r0, #:sb_g1:(two_groups_needed_alu_sb)
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add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb)
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add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb)
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add r0, r0, #:sb_g2:(three_groups_needed_alu_sb)
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@ LDR, PC-relative
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@ Instructions start at .text + 0x30
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add r0, r0, #:pc_g0_nc:(two_groups_needed_ldr_pc)
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ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)]
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@ Instructions start at .text + 0x38
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add r0, r0, #:pc_g0_nc:(three_groups_needed_ldr_pc)
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add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4)
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ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)]
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@ LDR, SB-relative
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ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)]
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add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb)
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ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)]
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add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb)
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add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb)
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ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)]
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@ LDRS, PC-relative
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@ Instructions start at .text + 0x5c
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ldrd r2, [r0, #:pc_g0:(one_group_needed_ldrs_pc)]
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@ Instructions start at .text + 0x60
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add r0, r0, #:pc_g0_nc:(two_groups_needed_ldrs_pc)
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ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)]
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@ Instructions start at .text + 0x68
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add r0, r0, #:pc_g0_nc:(three_groups_needed_ldrs_pc)
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add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4)
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ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)]
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@ LDRS, SB-relative
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ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)]
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add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb)
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ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)]
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add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb)
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add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb)
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ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)]
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@ LDC, PC-relative
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@ Instructions start at .text + 0x8c
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ldc 0, c0, [r0, #:pc_g0:(one_group_needed_ldc_pc)]
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@ Instructions start at .text + 0x90
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add r0, r0, #:pc_g0_nc:(two_groups_needed_ldc_pc)
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ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)]
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@ Instructions start at .text + 0x98
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add r0, r0, #:pc_g0_nc:(three_groups_needed_ldc_pc)
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add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4)
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ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)]
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@ LDC, SB-relative
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ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)]
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add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb)
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ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)]
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add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb)
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add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb)
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ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)]
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@ This point in the file is .text + 0xbc.
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one_group_needed_alu_pc:
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one_group_needed_ldrs_pc:
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one_group_needed_ldc_pc:
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mov r0, #0
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@ We will place the section zero at 0x0.
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.section zero, "x"
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one_group_needed_alu_sb:
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one_group_needed_ldr_sb:
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one_group_needed_ldrs_sb:
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one_group_needed_ldc_sb:
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mov r0, #0
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@ We will place the section alpha at 0xeef0.
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.section alpha, "x"
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two_groups_needed_alu_sb:
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two_groups_needed_ldr_sb:
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two_groups_needed_ldrs_sb:
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two_groups_needed_ldc_sb:
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two_groups_needed_alu_pc:
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two_groups_needed_ldr_pc:
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two_groups_needed_ldrs_pc:
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two_groups_needed_ldc_pc:
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mov r0, #0
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@ We will place the section beta at 0xffeef0.
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.section beta, "x"
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three_groups_needed_alu_sb:
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three_groups_needed_ldr_sb:
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three_groups_needed_ldrs_sb:
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three_groups_needed_ldc_sb:
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three_groups_needed_alu_pc:
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three_groups_needed_ldr_pc:
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three_groups_needed_ldrs_pc:
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three_groups_needed_ldc_pc:
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mov r0, #0
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