756 lines
18 KiB
C
756 lines
18 KiB
C
/* Native-dependent code for LynxOS.
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Copyright 1993, 1994 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "target.h"
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#include <sys/ptrace.h>
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#include <sys/wait.h>
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#include <sys/fpp.h>
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static unsigned long registers_addr PARAMS ((int pid));
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#define X(ENTRY)(offsetof(struct econtext, ENTRY))
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#ifdef I386
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/* Mappings from tm-i386v.h */
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static int regmap[] =
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{
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X(eax),
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X(ecx),
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X(edx),
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X(ebx),
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X(esp), /* sp */
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X(ebp), /* fp */
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X(esi),
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X(edi),
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X(eip), /* pc */
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X(flags), /* ps */
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X(cs),
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X(ss),
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X(ds),
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X(es),
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X(ecode), /* Lynx doesn't give us either fs or gs, so */
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X(fault), /* we just substitute these two in the hopes
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that they are useful. */
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};
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#endif /* I386 */
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#ifdef M68K
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/* Mappings from tm-m68k.h */
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static int regmap[] =
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{
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X(regs[0]), /* d0 */
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X(regs[1]), /* d1 */
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X(regs[2]), /* d2 */
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X(regs[3]), /* d3 */
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X(regs[4]), /* d4 */
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X(regs[5]), /* d5 */
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X(regs[6]), /* d6 */
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X(regs[7]), /* d7 */
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X(regs[8]), /* a0 */
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X(regs[9]), /* a1 */
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X(regs[10]), /* a2 */
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X(regs[11]), /* a3 */
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X(regs[12]), /* a4 */
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X(regs[13]), /* a5 */
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X(regs[14]), /* fp */
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offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
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X(status), /* ps */
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X(pc),
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X(fregs[0*3]), /* fp0 */
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X(fregs[1*3]), /* fp1 */
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X(fregs[2*3]), /* fp2 */
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X(fregs[3*3]), /* fp3 */
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X(fregs[4*3]), /* fp4 */
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X(fregs[5*3]), /* fp5 */
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X(fregs[6*3]), /* fp6 */
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X(fregs[7*3]), /* fp7 */
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X(fcregs[0]), /* fpcontrol */
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X(fcregs[1]), /* fpstatus */
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X(fcregs[2]), /* fpiaddr */
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X(ssw), /* fpcode */
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X(fault), /* fpflags */
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};
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#endif /* M68K */
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#ifdef SPARC
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/* Mappings from tm-sparc.h */
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#define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
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static int regmap[] =
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{
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-1, /* g0 */
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X(g1),
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X(g2),
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X(g3),
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X(g4),
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-1, /* g5->g7 aren't saved by Lynx */
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-1,
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-1,
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X(o[0]),
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X(o[1]),
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X(o[2]),
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X(o[3]),
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X(o[4]),
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X(o[5]),
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X(o[6]), /* sp */
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X(o[7]), /* ra */
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-1,-1,-1,-1,-1,-1,-1,-1, /* l0 -> l7 */
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-1,-1,-1,-1,-1,-1,-1,-1, /* i0 -> i7 */
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FX(f.fregs[0]), /* f0 */
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FX(f.fregs[1]),
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FX(f.fregs[2]),
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FX(f.fregs[3]),
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FX(f.fregs[4]),
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FX(f.fregs[5]),
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FX(f.fregs[6]),
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FX(f.fregs[7]),
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FX(f.fregs[8]),
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FX(f.fregs[9]),
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FX(f.fregs[10]),
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FX(f.fregs[11]),
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FX(f.fregs[12]),
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FX(f.fregs[13]),
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FX(f.fregs[14]),
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FX(f.fregs[15]),
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FX(f.fregs[16]),
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FX(f.fregs[17]),
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FX(f.fregs[18]),
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FX(f.fregs[19]),
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FX(f.fregs[20]),
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FX(f.fregs[21]),
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FX(f.fregs[22]),
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FX(f.fregs[23]),
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FX(f.fregs[24]),
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FX(f.fregs[25]),
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FX(f.fregs[26]),
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FX(f.fregs[27]),
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FX(f.fregs[28]),
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FX(f.fregs[29]),
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FX(f.fregs[30]),
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FX(f.fregs[31]),
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X(y),
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X(psr),
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X(wim),
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X(tbr),
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X(pc),
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X(npc),
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FX(fsr), /* fpsr */
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-1, /* cpsr */
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};
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#endif /* SPARC */
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#ifdef rs6000
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static int regmap[] =
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{
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X(iregs[0]), /* r0 */
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X(iregs[1]),
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X(iregs[2]),
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X(iregs[3]),
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X(iregs[4]),
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X(iregs[5]),
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X(iregs[6]),
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X(iregs[7]),
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X(iregs[8]),
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X(iregs[9]),
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X(iregs[10]),
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X(iregs[11]),
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X(iregs[12]),
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X(iregs[13]),
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X(iregs[14]),
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X(iregs[15]),
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X(iregs[16]),
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X(iregs[17]),
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X(iregs[18]),
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X(iregs[19]),
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X(iregs[20]),
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X(iregs[21]),
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X(iregs[22]),
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X(iregs[23]),
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X(iregs[24]),
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X(iregs[25]),
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X(iregs[26]),
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X(iregs[27]),
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X(iregs[28]),
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X(iregs[29]),
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X(iregs[30]),
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X(iregs[31]),
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X(fregs[0]), /* f0 */
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X(fregs[1]),
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X(fregs[2]),
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X(fregs[3]),
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X(fregs[4]),
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X(fregs[5]),
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X(fregs[6]),
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X(fregs[7]),
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X(fregs[8]),
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X(fregs[9]),
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X(fregs[10]),
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X(fregs[11]),
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X(fregs[12]),
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X(fregs[13]),
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X(fregs[14]),
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X(fregs[15]),
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X(fregs[16]),
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X(fregs[17]),
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X(fregs[18]),
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X(fregs[19]),
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X(fregs[20]),
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X(fregs[21]),
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X(fregs[22]),
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X(fregs[23]),
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X(fregs[24]),
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X(fregs[25]),
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X(fregs[26]),
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X(fregs[27]),
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X(fregs[28]),
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X(fregs[29]),
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X(fregs[30]),
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X(fregs[31]),
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X(srr0), /* IAR (PC) */
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X(srr1), /* MSR (PS) */
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X(cr), /* CR */
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X(lr), /* LR */
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X(ctr), /* CTR */
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X(xer), /* XER */
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X(mq) /* MQ */
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};
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#endif /* rs6000 */
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#ifdef SPARC
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/* This routine handles some oddball cases for Sparc registers and LynxOS.
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In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
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It also handles knows where to find the I & L regs on the stack. */
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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int whatregs = 0;
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#define WHATREGS_FLOAT 1
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#define WHATREGS_GEN 2
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#define WHATREGS_STACK 4
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if (regno == -1)
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whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
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else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
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whatregs = WHATREGS_STACK;
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else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
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whatregs = WHATREGS_FLOAT;
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else
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whatregs = WHATREGS_GEN;
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if (whatregs & WHATREGS_GEN)
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{
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struct econtext ec; /* general regs */
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char buf[MAX_REGISTER_RAW_SIZE];
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int retval;
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int i;
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errno = 0;
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retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_GETREGS)");
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memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
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supply_register (G0_REGNUM, buf);
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supply_register (TBR_REGNUM, (char *)&ec.tbr);
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memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
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4 * REGISTER_RAW_SIZE (G1_REGNUM));
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for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
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register_valid[i] = 1;
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supply_register (PS_REGNUM, (char *)&ec.psr);
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supply_register (Y_REGNUM, (char *)&ec.y);
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supply_register (PC_REGNUM, (char *)&ec.pc);
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supply_register (NPC_REGNUM, (char *)&ec.npc);
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supply_register (WIM_REGNUM, (char *)&ec.wim);
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memcpy (®isters[REGISTER_BYTE (O0_REGNUM)], ec.o,
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8 * REGISTER_RAW_SIZE (O0_REGNUM));
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for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
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register_valid[i] = 1;
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}
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if (whatregs & WHATREGS_STACK)
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{
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CORE_ADDR sp;
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int i;
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sp = read_register (SP_REGNUM);
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target_xfer_memory (sp + FRAME_SAVED_I0,
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®isters[REGISTER_BYTE(I0_REGNUM)],
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8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
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for (i = I0_REGNUM; i <= I7_REGNUM; i++)
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register_valid[i] = 1;
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target_xfer_memory (sp + FRAME_SAVED_L0,
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®isters[REGISTER_BYTE(L0_REGNUM)],
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8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
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for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
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register_valid[i] = 1;
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}
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if (whatregs & WHATREGS_FLOAT)
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{
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struct fcontext fc; /* fp regs */
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int retval;
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int i;
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errno = 0;
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retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_GETFPREGS)");
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memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
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32 * REGISTER_RAW_SIZE (FP0_REGNUM));
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for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
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register_valid[i] = 1;
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supply_register (FPS_REGNUM, (char *)&fc.fsr);
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}
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}
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/* This routine handles storing of the I & L regs for the Sparc. The trick
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here is that they actually live on the stack. The really tricky part is
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that when changing the stack pointer, the I & L regs must be written to
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where the new SP points, otherwise the regs will be incorrect when the
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process is started up again. We assume that the I & L regs are valid at
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this point. */
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void
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store_inferior_registers (regno)
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int regno;
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{
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int whatregs = 0;
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if (regno == -1)
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whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
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else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
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whatregs = WHATREGS_STACK;
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else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
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whatregs = WHATREGS_FLOAT;
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else if (regno == SP_REGNUM)
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whatregs = WHATREGS_STACK | WHATREGS_GEN;
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else
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whatregs = WHATREGS_GEN;
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if (whatregs & WHATREGS_GEN)
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{
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struct econtext ec; /* general regs */
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int retval;
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ec.tbr = read_register (TBR_REGNUM);
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memcpy (&ec.g1, ®isters[REGISTER_BYTE (G1_REGNUM)],
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4 * REGISTER_RAW_SIZE (G1_REGNUM));
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ec.psr = read_register (PS_REGNUM);
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ec.y = read_register (Y_REGNUM);
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ec.pc = read_register (PC_REGNUM);
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ec.npc = read_register (NPC_REGNUM);
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ec.wim = read_register (WIM_REGNUM);
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memcpy (ec.o, ®isters[REGISTER_BYTE (O0_REGNUM)],
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8 * REGISTER_RAW_SIZE (O0_REGNUM));
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errno = 0;
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retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_SETREGS)");
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}
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if (whatregs & WHATREGS_STACK)
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{
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int regoffset;
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CORE_ADDR sp;
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sp = read_register (SP_REGNUM);
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if (regno == -1 || regno == SP_REGNUM)
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{
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if (!register_valid[L0_REGNUM+5])
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abort();
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target_xfer_memory (sp + FRAME_SAVED_I0,
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®isters[REGISTER_BYTE (I0_REGNUM)],
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8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);
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target_xfer_memory (sp + FRAME_SAVED_L0,
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®isters[REGISTER_BYTE (L0_REGNUM)],
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8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
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}
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else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
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{
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if (!register_valid[regno])
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abort();
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if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
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regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
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+ FRAME_SAVED_L0;
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else
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regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
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+ FRAME_SAVED_I0;
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target_xfer_memory (sp + regoffset, ®isters[REGISTER_BYTE (regno)],
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REGISTER_RAW_SIZE (regno), 1);
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}
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}
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if (whatregs & WHATREGS_FLOAT)
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{
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struct fcontext fc; /* fp regs */
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int retval;
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/* We read fcontext first so that we can get good values for fq_t... */
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errno = 0;
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retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_GETFPREGS)");
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memcpy (fc.f.fregs, ®isters[REGISTER_BYTE (FP0_REGNUM)],
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32 * REGISTER_RAW_SIZE (FP0_REGNUM));
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fc.fsr = read_register (FPS_REGNUM);
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errno = 0;
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retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_SETFPREGS)");
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}
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}
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#endif /* SPARC */
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#if defined (I386) || defined (M68K) || defined (rs6000)
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/* Return the offset relative to the start of the per-thread data to the
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saved context block. */
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static unsigned long
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registers_addr(pid)
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int pid;
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{
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CORE_ADDR stblock;
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int ecpoff = offsetof(st_t, ecp);
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CORE_ADDR ecp;
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errno = 0;
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stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_THREADUSER)");
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ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
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0);
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if (errno)
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perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
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return ecp - stblock;
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}
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/* Fetch one or more registers from the inferior. REGNO == -1 to get
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them all. We actually fetch more than requested, when convenient,
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marking them as valid so we won't fetch them again. */
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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int reglo, reghi;
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int i;
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unsigned long ecp;
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if (regno == -1)
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{
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reglo = 0;
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reghi = NUM_REGS - 1;
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}
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else
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reglo = reghi = regno;
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ecp = registers_addr (inferior_pid);
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for (regno = reglo; regno <= reghi; regno++)
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{
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char buf[MAX_REGISTER_RAW_SIZE];
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int ptrace_fun = PTRACE_PEEKTHREAD;
|
|
|
|
#ifdef M68K
|
|
ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
|
|
#endif
|
|
|
|
for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
|
|
{
|
|
unsigned int reg;
|
|
|
|
errno = 0;
|
|
reg = ptrace (ptrace_fun, inferior_pid,
|
|
(PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
|
|
if (errno)
|
|
perror_with_name ("ptrace(PTRACE_PEEKUSP)");
|
|
|
|
*(int *)&buf[i] = reg;
|
|
}
|
|
supply_register (regno, buf);
|
|
}
|
|
}
|
|
|
|
/* Store our register values back into the inferior.
|
|
If REGNO is -1, do this for all registers.
|
|
Otherwise, REGNO specifies which register (so we can save time). */
|
|
|
|
/* Registers we shouldn't try to store. */
|
|
#if !defined (CANNOT_STORE_REGISTER)
|
|
#define CANNOT_STORE_REGISTER(regno) 0
|
|
#endif
|
|
|
|
void
|
|
store_inferior_registers (regno)
|
|
int regno;
|
|
{
|
|
int reglo, reghi;
|
|
int i;
|
|
unsigned long ecp;
|
|
|
|
if (regno == -1)
|
|
{
|
|
reglo = 0;
|
|
reghi = NUM_REGS - 1;
|
|
}
|
|
else
|
|
reglo = reghi = regno;
|
|
|
|
ecp = registers_addr (inferior_pid);
|
|
|
|
for (regno = reglo; regno <= reghi; regno++)
|
|
{
|
|
int ptrace_fun = PTRACE_POKEUSER;
|
|
|
|
if (CANNOT_STORE_REGISTER (regno))
|
|
continue;
|
|
|
|
#ifdef M68K
|
|
ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
|
|
#endif
|
|
|
|
for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
|
|
{
|
|
unsigned int reg;
|
|
|
|
reg = *(unsigned int *)®isters[REGISTER_BYTE (regno) + i];
|
|
|
|
errno = 0;
|
|
ptrace (ptrace_fun, inferior_pid,
|
|
(PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
|
|
if (errno)
|
|
perror_with_name ("ptrace(PTRACE_POKEUSP)");
|
|
}
|
|
}
|
|
}
|
|
#endif /* defined (I386) || defined (M68K) || defined (rs6000) */
|
|
|
|
/* Wait for child to do something. Return pid of child, or -1 in case
|
|
of error; store status through argument pointer OURSTATUS. */
|
|
|
|
int
|
|
child_wait (pid, ourstatus)
|
|
int pid;
|
|
struct target_waitstatus *ourstatus;
|
|
{
|
|
int save_errno;
|
|
int thread;
|
|
union wait status;
|
|
|
|
while (1)
|
|
{
|
|
int sig;
|
|
|
|
set_sigint_trap(); /* Causes SIGINT to be passed on to the
|
|
attached process. */
|
|
pid = wait (&status);
|
|
#ifdef SPARC
|
|
/* Swap halves of status so that the rest of GDB can understand it */
|
|
status.w_status = ((unsigned)status.w_status << 16) | ((unsigned)status.w_status >> 16);
|
|
#endif
|
|
|
|
save_errno = errno;
|
|
|
|
clear_sigint_trap();
|
|
|
|
if (pid == -1)
|
|
{
|
|
if (save_errno == EINTR)
|
|
continue;
|
|
fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
|
|
safe_strerror (save_errno));
|
|
/* Claim it exited with unknown signal. */
|
|
ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
|
|
ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
|
|
return -1;
|
|
}
|
|
|
|
if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
|
|
continue;
|
|
|
|
thread = status.w_tid; /* Get thread id from status */
|
|
|
|
/* Initial thread value can only be acquired via wait, so we have to
|
|
resort to this hack. */
|
|
|
|
if (TIDGET (inferior_pid) == 0)
|
|
{
|
|
inferior_pid = BUILDPID (inferior_pid, thread);
|
|
add_thread (inferior_pid);
|
|
}
|
|
|
|
pid = BUILDPID (pid, thread);
|
|
|
|
if (WIFSTOPPED(status)
|
|
&& WSTOPSIG(status) == SIGTRAP
|
|
&& !in_thread_list (pid))
|
|
{
|
|
int realsig;
|
|
|
|
realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE)0, 0);
|
|
|
|
if (realsig == SIGNEWTHREAD)
|
|
{
|
|
/* Simply ignore new thread notification, as we can't do anything
|
|
useful with such threads. All ptrace calls at this point just
|
|
fail for no apparent reason. The thread will eventually get a
|
|
real signal when it becomes real. */
|
|
child_resume (pid, 0, TARGET_SIGNAL_0);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
store_waitstatus (ourstatus, status.w_status);
|
|
|
|
return pid;
|
|
}
|
|
}
|
|
|
|
/* Resume execution of the inferior process.
|
|
If STEP is nonzero, single-step it.
|
|
If SIGNAL is nonzero, give it that signal. */
|
|
|
|
void
|
|
child_resume (pid, step, signal)
|
|
int pid;
|
|
int step;
|
|
enum target_signal signal;
|
|
{
|
|
int func;
|
|
|
|
errno = 0;
|
|
|
|
if (pid == -1)
|
|
{
|
|
/* Resume all threads. */
|
|
|
|
pid = inferior_pid;
|
|
}
|
|
|
|
func = step ? PTRACE_SINGLESTEP_ONE : PTRACE_CONT;
|
|
|
|
/* An address of (PTRACE_ARG3_TYPE)1 tells ptrace to continue from where
|
|
it was. (If GDB wanted it to start some other way, we have already
|
|
written a new PC value to the child.)
|
|
|
|
If this system does not support PT_STEP, a higher level function will
|
|
have called single_step() to transmute the step request into a
|
|
continue request (by setting breakpoints on all possible successor
|
|
instructions), so we don't have to worry about that here. */
|
|
|
|
ptrace (func, pid, (PTRACE_ARG3_TYPE) 1, target_signal_to_host (signal));
|
|
|
|
if (errno)
|
|
perror_with_name ("ptrace");
|
|
}
|
|
|
|
/* Convert a Lynx process ID to a string. Returns the string in a static
|
|
buffer. */
|
|
|
|
char *
|
|
lynx_pid_to_str (pid)
|
|
int pid;
|
|
{
|
|
static char buf[40];
|
|
|
|
sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
|
|
|
|
return buf;
|
|
}
|
|
|
|
/* Extract the register values out of the core file and store
|
|
them where `read_register' will find them.
|
|
|
|
CORE_REG_SECT points to the register values themselves, read into memory.
|
|
CORE_REG_SIZE is the size of that area.
|
|
WHICH says which set of registers we are handling (0 = int, 2 = float
|
|
on machines where they are discontiguous).
|
|
REG_ADDR is the offset from u.u_ar0 to the register values relative to
|
|
core_reg_sect. This is used with old-fashioned core files to
|
|
locate the registers in a large upage-plus-stack ".reg" section.
|
|
Original upage address X is at location core_reg_sect+x+reg_addr.
|
|
*/
|
|
|
|
void
|
|
fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
|
|
char *core_reg_sect;
|
|
unsigned core_reg_size;
|
|
int which;
|
|
unsigned reg_addr;
|
|
{
|
|
struct st_entry s;
|
|
unsigned int regno;
|
|
|
|
for (regno = 0; regno < NUM_REGS; regno++)
|
|
supply_register (regno, core_reg_sect + offsetof (st_t, ec)
|
|
+ regmap[regno]);
|
|
|
|
#ifdef SPARC
|
|
/* Fetching this register causes all of the I & L regs to be read from the
|
|
stack and validated. */
|
|
|
|
fetch_inferior_registers (I0_REGNUM);
|
|
#endif
|
|
}
|