125 lines
3.4 KiB
C
125 lines
3.4 KiB
C
#ifndef SIMOPS_H
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#define SIMOPS_H
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int OP_380 (void);
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int OP_480 (void);
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int OP_501 (void);
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int OP_700 (void);
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int OP_720 (void);
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int OP_10720 (void);
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int OP_740 (void);
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int OP_760 (void);
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int OP_10760 (void);
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int OP_1C0 (void);
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int OP_240 (void);
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int OP_600 (void);
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int OP_1A0 (void);
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int OP_180 (void);
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int OP_E0 (void);
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int OP_2E0 (void);
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int OP_6E0 (void);
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int OP_1E0 (void);
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int OP_260 (void);
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int OP_7E0 (void);
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int OP_C0 (void);
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int OP_220 (void);
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int OP_A0 (void);
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int OP_660 (void);
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int OP_80 (void);
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int OP_160 (void);
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int OP_200 (void);
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int OP_640 (void);
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int OP_2A0 (void);
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int OP_A007E0 (void);
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int OP_2C0 (void);
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int OP_C007E0 (void);
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int OP_280 (void);
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int OP_8007E0 (void);
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int OP_100 (void);
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int OP_680 (void);
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int OP_140 (void);
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int OP_6C0 (void);
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int OP_120 (void);
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int OP_6A0 (void);
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int OP_20 (void);
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int OP_7C0 (void);
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int OP_47C0 (void);
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int OP_87C0 (void);
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int OP_C7C0 (void);
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int OP_16007E0 (void);
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int OP_16087E0 (void);
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int OP_12007E0 (void);
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int OP_10007E0 (void);
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int OP_E607E0 (void);
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int OP_22207E0 (void);
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int OP_E407E0 (void);
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int OP_E207E0 (void);
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int OP_E007E0 (void);
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int OP_20007E0 (void);
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int OP_1C207E0 (void);
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int OP_1C007E0 (void);
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int OP_18207E0 (void);
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int OP_18007E0 (void);
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int OP_2C207E0 (void);
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int OP_2C007E0 (void);
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int OP_28207E0 (void);
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int OP_28007E0 (void);
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int OP_24207E0 (void);
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int OP_24007E0 (void);
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int OP_107E0 (void);
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int OP_10780 (void);
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int OP_1B0780 (void);
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int OP_130780 (void);
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int OP_B0780 (void);
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int OP_30780 (void);
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int OP_22007E0 (void);
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int OP_307F0 (void);
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int OP_107F0 (void);
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int OP_307E0 (void);
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int v850_float_compare(SIM_DESC sd, int cmp, sim_fpu wop1, sim_fpu wop2, int double_op_p);
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/* MEMORY ACCESS */
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unsigned32 load_data_mem(SIM_DESC sd, SIM_ADDR addr, int len);
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void store_data_mem(SIM_DESC sd, SIM_ADDR addr, int len, unsigned32 data);
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unsigned long Add32 (unsigned long a1, unsigned long a2, int * carry);
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/* FPU */
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/*
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FPU: update FPSR flags
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invalid, inexact, overflow, underflow
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*/
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extern void check_invalid_snan (SIM_DESC sd, sim_fpu_status, unsigned int);
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#define check_cvt_fi(sd, status, double_op_p) \
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update_fpsr (sd, status, FPSR_XEV | FPSR_XEI, double_op_p)
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#define check_cvt_if(sd, status, double_op_p) \
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update_fpsr (sd, status, FPSR_XEI, double_op_p)
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#define check_cvt_ff(sd, status, double_op_p) \
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update_fpsr (sd, status, FPSR_XEV | FPSR_XEI | FPSR_XEO | FPSR_XEU, double_op_p)
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extern void update_fpsr (SIM_DESC sd, sim_fpu_status, unsigned int, unsigned int);
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/*
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Exception
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*/
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void SignalException (SIM_DESC sd);
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void SignalExceptionFPE (SIM_DESC sd, unsigned int double_op_p);
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int mpu_load_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg);
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int mpu_store_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg);
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void v850_sar (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p);
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void v850_shl (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p);
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void v850_shr (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p);
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void v850_satadd (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p);
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void v850_satsub (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p);
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void v850_div (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p);
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void v850_divu (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p);
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#endif
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