5ef80fb0d1
* mips-tdep.c (mips_register_type): Simplify. Eliminate reference to MIPS_REGISTER_TYPE. Make integer registers signed. Make IRIX n32 registers 64 bit. (mips_register_raw_size, mips_register_byte): For pseudo registers, use the register's pseudo size and not the corresponding raw register's size. * config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Delete macro. * config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Delete macro. * config/mips/tm-irix6.h: Don't #undef MIPS_REGISTER_TYPE. * config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Delete macro.
106 lines
4.2 KiB
C
106 lines
4.2 KiB
C
/* Target machine description for SGI Iris under Irix 5, for GDB.
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "mips/tm-mips.h"
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/* Redefine register numbers for SGI. */
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#undef MIPS_REGISTER_NAMES
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#undef FP0_REGNUM
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#undef PC_REGNUM
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#undef HI_REGNUM
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#undef LO_REGNUM
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#undef CAUSE_REGNUM
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#undef BADVADDR_REGNUM
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#undef FCRCS_REGNUM
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#undef FCRIR_REGNUM
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/* Initializer for an array of names for registers 32 and above.
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There should be NUM_REGS-32 strings in this initializer. */
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#define MIPS_REGISTER_NAMES \
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{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
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}
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define FP0_REGNUM 32 /* Floating point register 0 (single float) */
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#define PC_REGNUM 64 /* Contains program counter */
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#define CAUSE_REGNUM 65 /* describes last exception */
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#define BADVADDR_REGNUM 66 /* bad vaddr for addressing exception */
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#define HI_REGNUM 67 /* Multiple/divide temp */
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#define LO_REGNUM 68 /* ... */
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#define FCRCS_REGNUM 69 /* FP control/status */
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#define FCRIR_REGNUM 70 /* FP implementation/revision */
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/* Offsets for register values in _sigtramp frame.
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sigcontext is immediately above the _sigtramp frame on Irix. */
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#define SIGFRAME_BASE 0x0
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#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4)
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#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 3 * 4)
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 3 * 4 + 32 * 4 + 4)
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/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
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_MIPS_SIM in a tm-*.h file is simply wrong! Those are
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host-dependant macros (provided by /usr/include) and stop any
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chance of the target being cross compiled */
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#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
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/*
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* Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
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*/
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#undef MIPS_REGISTER_BYTE
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#define MIPS_REGISTER_BYTE(N) \
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(((N) < FP0_REGNUM) ? (N) * mips_regsize (current_gdbarch) : \
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((N) < FP0_REGNUM + 32) ? \
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FP0_REGNUM * mips_regsize (current_gdbarch) + \
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((N) - FP0_REGNUM) * sizeof(double) : \
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32 * sizeof(double) + ((N) - 32) * mips_regsize (current_gdbarch))
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#endif /* N32 */
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/* The signal handler trampoline is called _sigtramp. */
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#undef IN_SIGTRAMP
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#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
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/* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
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get to the saved PC (the register mask and status register are both
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32 bits) and then another 4 to get to the lower 32 bits. We skip
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the same 4 bytes, plus the 8 bytes for the PC to get to the
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registers, and add another 4 to get to the lower 32 bits. We skip
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8 bytes per register. */
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#undef SIGFRAME_PC_OFF
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#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
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#undef SIGFRAME_REGSAVE_OFF
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#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
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#undef SIGFRAME_FPREGSAVE_OFF
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
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#define SIGFRAME_REG_SIZE 8
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