cce0efb55e
include cgen-ops.h in decodev10.c and decodev32.c. * cris/sim-main.h: Don't include cgen-ops.h here. * cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c, cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c, cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c, cris/decodev10.h, cris/decodev32.c, cris/decodev32.h, cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c, cris/semcrisv32f-switch.c: Regenerate.
227 lines
6.7 KiB
C
227 lines
6.7 KiB
C
/* Main header for the CRIS simulator, based on the m32r header.
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Copyright (C) 2004, 2005 Free Software Foundation, Inc.
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Contributed by Axis Communications.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* All FIXME:s present in m32r apply here too; I just refuse to blindly
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carry them over, as I don't know if they're really things that need
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fixing. */
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define USING_SIM_BASE_H
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struct _sim_cpu;
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typedef struct _sim_cpu SIM_CPU;
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#include "symcat.h"
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#include "sim-basics.h"
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#include "cgen-types.h"
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#include "cris-desc.h"
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#include "cris-opc.h"
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#include "arch.h"
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/* These must be defined before sim-base.h. */
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typedef USI sim_cia;
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#define CIA_GET(cpu) CPU_PC_GET (cpu)
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#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
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do { \
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if (cpu) /* Null if ctrl-c. */ \
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sim_pc_set ((cpu), (cia)); \
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} while (0)
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#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
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do { \
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sim_pc_set ((cpu), (cia)); \
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} while (0)
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#include "sim-base.h"
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#include "cgen-sim.h"
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#include "cris-sim.h"
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struct cris_sim_mmapped_page {
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USI addr;
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struct cris_sim_mmapped_page *prev;
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};
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struct cris_thread_info {
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/* Identifier for this thread. */
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unsigned int threadid;
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/* Identifier for parent thread. */
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unsigned int parent_threadid;
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/* Signal to send to parent at exit. */
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int exitsig;
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/* Exit status. */
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int exitval;
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/* Only as storage to return the "set" value to the "get" method.
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I'm not sure whether this is useful per-thread. */
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USI priority;
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struct
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{
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USI altstack;
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USI options;
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char action;
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char pending;
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char blocked;
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char blocked_suspendsave;
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/* The handler stub unblocks the signal, so we don't need a separate
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"temporary save" for that. */
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} sigdata[64];
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/* Register context, swapped with _sim_cpu.cpu_data. */
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void *cpu_context;
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/* Similar, temporary copy for the state at a signal call. */
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void *cpu_context_atsignal;
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/* The number of the reading and writing ends of a pipe if waiting for
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the reader, else 0. */
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int pipe_read_fd;
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int pipe_write_fd;
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/* System time at last context switch when this thread ran. */
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USI last_execution;
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/* Nonzero if we just executed a syscall. */
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char at_syscall;
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/* Nonzero if any of sigaction[0..64].pending is true. */
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char sigpending;
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/* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
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call. */
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char sigsuspended;
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};
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struct _sim_cpu {
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/* sim/common cpu base. */
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sim_cpu_base base;
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/* Static parts of cgen. */
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CGEN_CPU cgen_cpu;
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CRIS_MISC_PROFILE cris_misc_profile;
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#define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
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/* Copy of previous data; only valid when emitting trace-data after
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each insn. */
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CRIS_MISC_PROFILE cris_prev_misc_profile;
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#define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
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/* Simulator environment data. */
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USI endmem;
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USI endbrk;
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USI stack_low;
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struct cris_sim_mmapped_page *highest_mmapped_page;
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/* Number of syscalls performed or in progress, counting once extra
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for every time a blocked thread (internally, when threading) polls
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the (pipe) blockage. By default, this is also a time counter: to
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minimize performance noise from minor compiler changes,
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instructions take no time and syscalls always take 1ms. */
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USI syscalls;
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/* Number of execution contexts minus one. */
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int m1threads;
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/* Current thread number; index into thread_data when m1threads != 0. */
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int threadno;
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/* When a new thread is created, it gets a unique number, which we
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count here. */
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int max_threadid;
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/* Thread-specific info, for simulator thread support, created at
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"clone" call. Vector of [threads+1] when m1threads > 0. */
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struct cris_thread_info *thread_data;
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/* "If CLONE_SIGHAND is set, the calling process and the child pro-
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cesses share the same table of signal handlers." ... "However, the
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calling process and child processes still have distinct signal
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masks and sets of pending signals." See struct cris_thread_info
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for sigmasks and sigpendings. */
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USI sighandler[64];
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/* Function for initializing CPU thread context, which varies in size
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with each CPU model. They should be in some constant parts or
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initialized in *_init_cpu, but we can't modify that for now. */
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void* (*make_thread_cpu_data) (SIM_CPU *, void *);
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size_t thread_cpu_data_size;
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/* CPU-model specific parts go here.
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Note that in files that don't need to access these pieces WANT_CPU_FOO
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won't be defined and thus these parts won't appear. This is ok in the
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sense that things work. It is a source of bugs though.
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One has to of course be careful to not take the size of this
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struct and no structure members accessed in non-cpu specific files can
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go after here. */
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#if defined (WANT_CPU_CRISV0F)
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CRISV0F_CPU_DATA cpu_data;
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#elif defined (WANT_CPU_CRISV3F)
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CRISV3F_CPU_DATA cpu_data;
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#elif defined (WANT_CPU_CRISV8F)
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CRISV8F_CPU_DATA cpu_data;
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#elif defined (WANT_CPU_CRISV10F)
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CRISV10F_CPU_DATA cpu_data;
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#elif defined (WANT_CPU_CRISV32F)
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CRISV32F_CPU_DATA cpu_data;
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#else
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/* Let's assume all cpu_data have the same alignment requirements, so
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they all are laid out at the same address. Since we can't get the
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exact definition, we also assume that it has no higher alignment
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requirements than a vector of, say, 16 pointers. (A single member
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is often special-cased, and possibly two as well so we don't want
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that). */
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union { void *dummy[16]; } cpu_data_placeholder;
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#endif
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};
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/* The sim_state struct. */
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struct sim_state {
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sim_cpu *cpu;
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#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
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CGEN_STATE cgen_state;
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sim_state_base base;
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};
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/* Misc. */
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/* Catch address exceptions. */
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extern SIM_CORE_SIGNAL_FN cris_core_signal;
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#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
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cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
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(TRANSFER), (ERROR))
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/* Default memory size. */
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#define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
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extern device cris_devices;
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#endif /* SIM_MAIN_H */
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