a8981d6751
* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate. * sem-switch.c,sem.c: Regenerate. * mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}. * cpux.c,cpux.h,modelx.c,semx.c: Regenerate. * m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions. * mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
193 lines
4.3 KiB
C
193 lines
4.3 KiB
C
# Simulator main loop for m32rx. -*- C -*-
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# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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#
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# This file is part of the GNU Simulators.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2, or (at your option)
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# any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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# Syntax:
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# /bin/sh mainloop.in init|support|{full,fast}-{extract,exec}-{scache,noscache}
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# ??? After a few more ports are done, revisit.
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# Will eventually need to machine generate a lot of this.
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case "x$1" in
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xsupport)
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cat <<EOF
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EOF
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;;
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xinit)
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cat <<EOF
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const IDESC *d1,*d2;
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ARGBUF abufs[MAX_PARALLEL_INSNS];
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PAREXEC pbufs[MAX_PARALLEL_INSNS];
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EOF
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;;
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xfull-extract-* | xfast-extract-*)
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cat <<EOF
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{
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PCADDR pc = CPU (h_pc);
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/* ??? This code isn't very fast. Let's get it working first. */
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if ((pc & 3) != 0)
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{
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USI insn = GETIMEMUHI (current_cpu, pc);
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insn &= 0x7fff;
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d1 = m32rx_decode (current_cpu, pc, insn);
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abufs[0].insn = insn;
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abufs[0].idesc = d1;
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icount = 1;
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}
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else
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{
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USI insn = GETIMEMUSI (current_cpu, pc);
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if ((SI) insn < 0)
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn;
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abufs[0].idesc = d1;
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icount = 1;
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}
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else
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{
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if (insn & 0x8000)
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn >> 16;
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abufs[0].idesc = d1;
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d2 = m32rx_decode (current_cpu, pc, insn & 0x7fff);
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abufs[1].insn = insn & 0x7fff;
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abufs[1].idesc = d2;
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icount = 2;
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}
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else
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{
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d1 = m32rx_decode (current_cpu, pc, insn >> 16);
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abufs[0].insn = insn >> 16;
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abufs[0].idesc = d1;
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icount = 1;
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}
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}
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}
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{
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int icount2 = icount;
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USI insn = abufs[0].insn;
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const IDESC *decode = d1;
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/* decode, par_exec, and insn are refered to by readx.c. */
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PAREXEC *par_exec = &pbufs[0];
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do
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{
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#define DEFINE_SWITCH
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#include "readx.c"
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decode = d2;
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insn = abufs[1].insn;
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++par_exec;
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}
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while (--icount2 != 0);
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}
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}
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EOF
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;;
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xfull-exec-* | xfast-exec-*)
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cat <<EOF
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{
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SEM_ARG sem_arg = &abufs[0];
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PAREXEC *par_exec = &pbufs[0];
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PCADDR new_pc;
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#if 0 /* wip */
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/* If doing parallel execution, verify insns are in the right pipeline. */
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if (icount == 2)
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{
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...
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}
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#endif
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TRACE_INSN_INIT (current_cpu, 1);
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TRACE_INSN (current_cpu, d1->opcode, sem_arg, CPU (h_pc));
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new_pc = (*d1->sem_full) (current_cpu, sem_arg, par_exec);
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TRACE_INSN_FINI (current_cpu, icount == 1);
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/* The result of the semantic fn is one of:
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- next address, branch only
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- NEW_PC_SKIP, sc/snc insn
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- NEW_PC_2, 2 byte non-branch non-sc/snc insn
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- NEW_PC_4, 4 byte non-branch insn
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*/
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/* The tests are ordered to try to favor the more frequent cases, while
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keeping the over all costs down. */
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if (new_pc == NEW_PC_4)
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CPU (h_pc) += 4;
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else if (icount == 2)
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{
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/* Note that we only get here if doing parallel execution. */
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if (new_pc == NEW_PC_SKIP)
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{
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/* ??? Need generic notion of bypassing an insn for the name of
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this macro. Annulled? On the otherhand such tracing can go
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in the sc/snc semantic fn. */
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; /*TRACE_INSN_SKIPPED (current_cpu);*/
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CPU (h_pc) += 4;
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}
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else
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{
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PCADDR pc2;
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++sem_arg;
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++par_exec;
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TRACE_INSN_INIT (current_cpu, 0);
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TRACE_INSN (current_cpu, d2->opcode, sem_arg, CPU (h_pc) + 2);
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/* pc2 isn't used. It's assigned a value for debugging. */
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pc2 = (*d2->sem_full) (current_cpu, sem_arg, par_exec);
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TRACE_INSN_FINI (current_cpu, 1);
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if (NEW_PC_BRANCH_P (new_pc))
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CPU (h_pc) = new_pc;
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else
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CPU (h_pc) += 4;
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}
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}
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else if (NEW_PC_BRANCH_P (new_pc))
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CPU (h_pc) = new_pc;
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else
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CPU (h_pc) += 2;
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}
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EOF
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;;
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*)
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echo "Invalid argument to mainloop.in: $1" >&2
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exit 1
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;;
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esac
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