old-cross-binutils/ld/testsuite/ld-powerpc/plt1.d
Alan Modra ed6b7ef4bc * ld-powerpc/powerpc.exp: Modify emulation option passed to ld
when little-endian.
	* ld-powerpc/apuinfo-nul.rd: Update for le output.
	* ld-powerpc/apuinfo.rd: Likewise.
	* ld-powerpc/plt1.d: Likewise.
	* ld-powerpc/relax.d: Likewise.
	* ld-powerpc/relaxr.d: Likewise.
	* ld-powerpc/sdadyn.d: Likewise.
	* ld-powerpc/tls.d: Likewise.
	* ld-powerpc/tls.g: Likewise.
	* ld-powerpc/tls.t: Likewise.
	* ld-powerpc/tls32.d: Likewise.
	* ld-powerpc/tls32.g: Likewise.
	* ld-powerpc/tls32.t: Likewise.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexe.g: Likewise.
	* ld-powerpc/tlsexe.r: Likewise.
	* ld-powerpc/tlsexe.t: Likewise.
	* ld-powerpc/tlsexe32.d: Likewise.
	* ld-powerpc/tlsexe32.g: Likewise.
	* ld-powerpc/tlsexe32.r: Likewise.
	* ld-powerpc/tlsexe32.t: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsexetoc.g: Likewise.
	* ld-powerpc/tlsexetoc.r: Likewise.
	* ld-powerpc/tlsexetoc.t: Likewise.
	* ld-powerpc/tlsmark.d: Likewise.
	* ld-powerpc/tlsmark32.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt3.d: Likewise.
	* ld-powerpc/tlsopt3_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlsso.g: Likewise.
	* ld-powerpc/tlsso.r: Likewise.
	* ld-powerpc/tlsso.t: Likewise.
	* ld-powerpc/tlsso32.d: Likewise.
	* ld-powerpc/tlsso32.g: Likewise.
	* ld-powerpc/tlsso32.r: Likewise.
	* ld-powerpc/tlsso32.t: Likewise.
	* ld-powerpc/tlstoc.d: Likewise.
	* ld-powerpc/tlstoc.g: Likewise.
	* ld-powerpc/tlstoc.t: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
	* ld-powerpc/tlstocso.g: Likewise.
	* ld-powerpc/tlstocso.t: Likewise.
	* ld-powerpc/tocopt.out: Likewise.
2012-10-29 09:25:53 +00:00

20 lines
579 B
Makefile

#source: plt1.s
#as: -a32
#objdump: -dr
#target: powerpc*-*-*
.*
Disassembly of section .text:
0+ <_start>:
0: (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,4 .*
4: (7f c8 02 a6|a6 02 c8 7f) mflr r30
8: (3f de 00 00|00 00 de 3f) addis r30,r30,0
(a|8): R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x(6|4)
c: (3b de 00 0.|0. 00 de 3b) addi r30,r30,.*
(e|c): R_PPC_REL16_LO _GLOBAL_OFFSET_TABLE_\+0x(a|8)
10: (48 00 00 01|01 00 00 48) bl 10 .*
10: R_PPC_PLTREL24 _exit
14: (48 00 00 00|00 00 00 48) b 14 .*
14: R_PPC_REL24 _start