299 lines
9.5 KiB
Text
299 lines
9.5 KiB
Text
@c Copyright (C) 1997-2014 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node D30V-Dependent
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@chapter D30V Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter D30V Dependent Features
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@end ifclear
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@cindex D30V support
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@menu
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* D30V-Opts:: D30V Options
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* D30V-Syntax:: Syntax
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* D30V-Float:: Floating Point
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* D30V-Opcodes:: Opcodes
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@end menu
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@node D30V-Opts
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@section D30V Options
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@cindex options, D30V
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@cindex D30V options
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The Mitsubishi D30V version of @code{@value{AS}} has a few machine
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dependent options.
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@table @samp
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@item -O
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The D30V can often execute two sub-instructions in parallel. When this option
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is used, @code{@value{AS}} will attempt to optimize its output by detecting when
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instructions can be executed in parallel.
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@item -n
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When this option is used, @code{@value{AS}} will issue a warning every
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time it adds a nop instruction.
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@item -N
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When this option is used, @code{@value{AS}} will issue a warning if it
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needs to insert a nop after a 32-bit multiply before a load or 16-bit
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multiply instruction.
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@end table
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@node D30V-Syntax
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@section Syntax
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@cindex D30V syntax
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@cindex syntax, D30V
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The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual.
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The differences are detailed below.
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@menu
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* D30V-Size:: Size Modifiers
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* D30V-Subs:: Sub-Instructions
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* D30V-Chars:: Special Characters
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* D30V-Guarded:: Guarded Execution
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* D30V-Regs:: Register Names
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* D30V-Addressing:: Addressing Modes
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@end menu
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@node D30V-Size
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@subsection Size Modifiers
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@cindex D30V size modifiers
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@cindex size modifiers, D30V
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The D30V version of @code{@value{AS}} uses the instruction names in the D30V
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Architecture Manual. However, the names in the manual are sometimes ambiguous.
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There are instruction names that can assemble to a short or long form opcode.
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How does the assembler pick the correct form? @code{@value{AS}} will always pick the
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smallest form if it can. When dealing with a symbol that is not defined yet when a
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line is being assembled, it will always use the long form. If you need to force the
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assembler to use either the short or long form of the instruction, you can append
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either @samp{.s} (short) or @samp{.l} (long) to it. For example, if you are writing
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an assembly program and you want to do a branch to a symbol that is defined later
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in your program, you can write @samp{bra.s foo}.
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Objdump and GDB will always append @samp{.s} or @samp{.l} to instructions which
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have both short and long forms.
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@node D30V-Subs
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@subsection Sub-Instructions
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@cindex D30V sub-instructions
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@cindex sub-instructions, D30V
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The D30V assembler takes as input a series of instructions, either one-per-line,
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or in the special two-per-line format described in the next section. Some of these
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instructions will be short-form or sub-instructions. These sub-instructions can be packed
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into a single instruction. The assembler will do this automatically. It will also detect
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when it should not pack instructions. For example, when a label is defined, the next
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instruction will never be packaged with the previous one. Whenever a branch and link
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instruction is called, it will not be packaged with the next instruction so the return
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address will be valid. Nops are automatically inserted when necessary.
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If you do not want the assembler automatically making these decisions, you can control
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the packaging and execution type (parallel or sequential) with the special execution
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symbols described in the next section.
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@node D30V-Chars
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@subsection Special Characters
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@cindex line comment character, D30V
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@cindex D30V line comment character
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A semicolon (@samp{;}) can be used anywhere on a line to start a
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comment that extends to the end of the line.
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If a @samp{#} appears as the first character of a line, the whole line
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is treated as a comment, but in this case the line could also be a
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logical line number directive (@pxref{Comments}) or a preprocessor
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control command (@pxref{Preprocessing}).
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@cindex sub-instruction ordering, D30V
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@cindex D30V sub-instruction ordering
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Sub-instructions may be executed in order, in reverse-order, or in parallel.
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Instructions listed in the standard one-per-line format will be executed
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sequentially unless you use the @samp{-O} option.
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To specify the executing order, use the following symbols:
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@table @samp
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@item ->
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Sequential with instruction on the left first.
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@item <-
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Sequential with instruction on the right first.
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@item ||
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Parallel
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@end table
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The D30V syntax allows either one instruction per line, one instruction per line with
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the execution symbol, or two instructions per line. For example
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@table @code
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@item abs r2,r3 -> abs r4,r5
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Execute these sequentially. The instruction on the right is in the right
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container and is executed second.
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@item abs r2,r3 <- abs r4,r5
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Execute these reverse-sequentially. The instruction on the right is in the right
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container, and is executed first.
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@item abs r2,r3 || abs r4,r5
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Execute these in parallel.
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@item ldw r2,@@(r3,r4) ||
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@itemx mulx r6,r8,r9
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Two-line format. Execute these in parallel.
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@item mulx a0,r8,r9
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@itemx stw r2,@@(r3,r4)
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Two-line format. Execute these sequentially unless @samp{-O} option is
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used. If the @samp{-O} option is used, the assembler will determine if
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the instructions could be done in parallel (the above two instructions
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can be done in parallel), and if so, emit them as parallel instructions.
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The assembler will put them in the proper containers. In the above
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example, the assembler will put the @samp{stw} instruction in left
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container and the @samp{mulx} instruction in the right container.
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@item stw r2,@@(r3,r4) ->
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@itemx mulx a0,r8,r9
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Two-line format. Execute the @samp{stw} instruction followed by the
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@samp{mulx} instruction sequentially. The first instruction goes in the
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left container and the second instruction goes into right container.
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The assembler will give an error if the machine ordering constraints are
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violated.
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@item stw r2,@@(r3,r4) <-
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@itemx mulx a0,r8,r9
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Same as previous example, except that the @samp{mulx} instruction is
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executed before the @samp{stw} instruction.
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@end table
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@cindex symbol names, @samp{$} in
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@cindex @code{$} in symbol names
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Since @samp{$} has no special meaning, you may use it in symbol names.
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@node D30V-Guarded
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@subsection Guarded Execution
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@cindex D30V Guarded Execution
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@code{@value{AS}} supports the full range of guarded execution
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directives for each instruction. Just append the directive after the
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instruction proper. The directives are:
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@table @samp
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@item /tx
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Execute the instruction if flag f0 is true.
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@item /fx
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Execute the instruction if flag f0 is false.
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@item /xt
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Execute the instruction if flag f1 is true.
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@item /xf
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Execute the instruction if flag f1 is false.
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@item /tt
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Execute the instruction if both flags f0 and f1 are true.
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@item /tf
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Execute the instruction if flag f0 is true and flag f1 is false.
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@end table
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@node D30V-Regs
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@subsection Register Names
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@cindex D30V registers
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@cindex registers, D30V
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You can use the predefined symbols @samp{r0} through @samp{r63} to refer
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to the D30V registers. You can also use @samp{sp} as an alias for
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@samp{r63} and @samp{link} as an alias for @samp{r62}. The accumulators
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are @samp{a0} and @samp{a1}.
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The D30V also has predefined symbols for these control registers and status bits:
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@table @code
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@item psw
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Processor Status Word
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@item bpsw
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Backup Processor Status Word
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@item pc
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Program Counter
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@item bpc
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Backup Program Counter
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@item rpt_c
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Repeat Count
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@item rpt_s
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Repeat Start address
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@item rpt_e
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Repeat End address
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@item mod_s
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Modulo Start address
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@item mod_e
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Modulo End address
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@item iba
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Instruction Break Address
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@item f0
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Flag 0
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@item f1
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Flag 1
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@item f2
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Flag 2
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@item f3
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Flag 3
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@item f4
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Flag 4
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@item f5
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Flag 5
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@item f6
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Flag 6
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@item f7
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Flag 7
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@item s
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Same as flag 4 (saturation flag)
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@item v
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Same as flag 5 (overflow flag)
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@item va
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Same as flag 6 (sticky overflow flag)
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@item c
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Same as flag 7 (carry/borrow flag)
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@item b
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Same as flag 7 (carry/borrow flag)
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@end table
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@node D30V-Addressing
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@subsection Addressing Modes
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@cindex addressing modes, D30V
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@cindex D30V addressing modes
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@code{@value{AS}} understands the following addressing modes for the D30V.
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@code{R@var{n}} in the following refers to any of the numbered
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registers, but @emph{not} the control registers.
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@table @code
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@item R@var{n}
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Register direct
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@item @@R@var{n}
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Register indirect
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@item @@R@var{n}+
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Register indirect with post-increment
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@item @@R@var{n}-
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Register indirect with post-decrement
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@item @@-SP
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Register indirect with pre-decrement
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@item @@(@var{disp}, R@var{n})
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Register indirect with displacement
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@item @var{addr}
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PC relative address (for branch or rep).
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@item #@var{imm}
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Immediate data (the @samp{#} is optional and ignored)
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@end table
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@node D30V-Float
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@section Floating Point
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@cindex floating point, D30V
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@cindex D30V floating point
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The D30V has no hardware floating point, but the @code{.float} and @code{.double}
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directives generates @sc{ieee} floating-point numbers for compatibility
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with other development tools.
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@node D30V-Opcodes
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@section Opcodes
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@cindex D30V opcode summary
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@cindex opcode summary, D30V
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@cindex mnemonics, D30V
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@cindex instruction summary, D30V
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For detailed information on the D30V machine instruction set, see
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@cite{D30V Architecture: A VLIW Microprocessor for Multimedia Applications}
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(Mitsubishi Electric Corp.).
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@code{@value{AS}} implements all the standard D30V opcodes. The only changes are those
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described in the section on size modifiers
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