old-cross-binutils/ld/testsuite/ld-powerpc/tls32.d
Alan Modra ed6b7ef4bc * ld-powerpc/powerpc.exp: Modify emulation option passed to ld
when little-endian.
	* ld-powerpc/apuinfo-nul.rd: Update for le output.
	* ld-powerpc/apuinfo.rd: Likewise.
	* ld-powerpc/plt1.d: Likewise.
	* ld-powerpc/relax.d: Likewise.
	* ld-powerpc/relaxr.d: Likewise.
	* ld-powerpc/sdadyn.d: Likewise.
	* ld-powerpc/tls.d: Likewise.
	* ld-powerpc/tls.g: Likewise.
	* ld-powerpc/tls.t: Likewise.
	* ld-powerpc/tls32.d: Likewise.
	* ld-powerpc/tls32.g: Likewise.
	* ld-powerpc/tls32.t: Likewise.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexe.g: Likewise.
	* ld-powerpc/tlsexe.r: Likewise.
	* ld-powerpc/tlsexe.t: Likewise.
	* ld-powerpc/tlsexe32.d: Likewise.
	* ld-powerpc/tlsexe32.g: Likewise.
	* ld-powerpc/tlsexe32.r: Likewise.
	* ld-powerpc/tlsexe32.t: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsexetoc.g: Likewise.
	* ld-powerpc/tlsexetoc.r: Likewise.
	* ld-powerpc/tlsexetoc.t: Likewise.
	* ld-powerpc/tlsmark.d: Likewise.
	* ld-powerpc/tlsmark32.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt3.d: Likewise.
	* ld-powerpc/tlsopt3_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlsso.g: Likewise.
	* ld-powerpc/tlsso.r: Likewise.
	* ld-powerpc/tlsso.t: Likewise.
	* ld-powerpc/tlsso32.d: Likewise.
	* ld-powerpc/tlsso32.g: Likewise.
	* ld-powerpc/tlsso32.r: Likewise.
	* ld-powerpc/tlsso32.t: Likewise.
	* ld-powerpc/tlstoc.d: Likewise.
	* ld-powerpc/tlstoc.g: Likewise.
	* ld-powerpc/tlstoc.t: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
	* ld-powerpc/tlstocso.g: Likewise.
	* ld-powerpc/tlstocso.t: Likewise.
	* ld-powerpc/tocopt.out: Likewise.
2012-10-29 09:25:53 +00:00

50 lines
1.7 KiB
Makefile

#source: tls32.s
#source: tlslib32.s
#as: -a32
#ld:
#objdump: -dr
#target: powerpc*-*-*
.*
Disassembly of section \.text:
0+1800094 <_start>:
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 90 3c|3c 90 63 38) addi r3,r3,-28612
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 90 20|20 90 63 38) addi r3,r3,-28640
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
.*: (39 23 80 24|24 80 23 39) addi r9,r3,-32732
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (81 49 80 28|28 80 49 81) lwz r10,-32728\(r9\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a1 49 90 30|30 90 49 a1) lhz r10,-28624\(r9\)
.*: (89 42 90 34|34 90 42 89) lbz r10,-28620\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (99 49 90 38|38 90 49 99) stb r10,-28616\(r9\)
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (b1 49 90 30|30 90 49 b1) sth r10,-28624\(r9\)
.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
0+1800104 <__tls_get_addr>:
.*: (4e 80 00 20|20 00 80 4e) blr
Disassembly of section \.got:
0+1810128 <_GLOBAL_OFFSET_TABLE_-0x4>:
.*: (4e 80 00 21|21 00 80 4e) blrl
0+181012c <_GLOBAL_OFFSET_TABLE_>:
\.\.\.