691c0433df
* mips-tdep.h (deprecated_mips_set_processor_regs_hack): Declare. * remote-mips.c (common_open): Instead of "mips_read_register_type" and "mips_set_processor_type_command" call "deprecated_mips_set_processor_regs_hack". * config/mips/tm-mips.h (mips_read_processor_type): Delete declaration. (mips_set_processor_type_command): Delete declaration. * mips-tdep.c (mips_gdbarch_init): Update comment. (mips_dump_tdep): Do not print MIPS_REGISTER_NAMES. (mips_set_processor_type): Delete function. (NUM_MIPS_PROCESSOR_REGS): Define. (mips_show_processor_type_command): Delete function. (mips_set_processor_type_command): Delete function. (tmp_mips_processor_type): Delete. (mips_processor_type): Delete. (mips_processor_type_table): Delete. (mips_r3051_reg_names): Delete. (mips_r3081_reg_names): Delete. (mips_lsi33k_reg_names): Delete. (mips_processor_reg_names): Delete. (mips_read_processor_type): Delete function. (deprecated_mips_set_processor_regs_hack): New function. (struct gdbarch_tdep): Add member "mips_processor_reg_names". (mips_register_name): Get the processor names from the tdep. (mips_tx39_reg_names): New array. (mips_generic_reg_names): Wire to a standard set of names. (mips_gdbarch_init): Set "mips_processor_reg_names". * config/mips/tm-irix5.h (MIPS_REGISTER_NAMES): Delete macro. * config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Delete macro. * config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Delete macro.
119 lines
4.8 KiB
C
119 lines
4.8 KiB
C
/* Definitions to make GDB run on a mips box under 4.3bsd.
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Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
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1997, 1998, 1999, 2000, 2002, 2003 Free Software Foundation, Inc.
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Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
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and by Alessandro Forin (af@cs.cmu.edu) at CMU..
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef TM_MIPS_H
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#define TM_MIPS_H 1
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#define GDB_MULTI_ARCH 1
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#include "regcache.h"
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struct frame_info;
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struct symbol;
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struct type;
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struct value;
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#include <bfd.h>
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#include "coff/sym.h" /* Needed for PDR below. */
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#include "coff/symconst.h"
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/* Return non-zero if PC points to an instruction which will cause a step
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to execute both the instruction at PC and an instruction at PC+4. */
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extern int mips_step_skips_delay (CORE_ADDR);
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define ZERO_REGNUM 0 /* read-only register, always 0 */
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#define V0_REGNUM 2 /* Function integer return value */
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#define A0_REGNUM 4 /* Loc of first arg during a subr call */
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#define T9_REGNUM 25 /* Contains address of callee in PIC */
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#define SP_REGNUM 29 /* Contains address of top of stack */
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#define RA_REGNUM 31 /* Contains return address value */
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#define PS_REGNUM 32 /* Contains processor status */
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#define UNUSED_REGNUM 73 /* Never used, FIXME */
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#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
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#define PRID_REGNUM 89 /* Processor ID */
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#define LAST_EMBED_REGNUM 89 /* Last one */
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/* Special symbol found in blocks associated with routines. We can hang
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mips_extra_func_info_t's off of this. */
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#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
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extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
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/* Specific information about a procedure.
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This overlays the MIPS's PDR records,
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mipsread.c (ab)uses this to save memory */
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typedef struct mips_extra_func_info
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{
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long numargs; /* number of args to procedure (was iopt) */
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bfd_vma high_addr; /* upper address bound */
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long frame_adjust; /* offset of FP from SP (used on MIPS16) */
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PDR pdr; /* Procedure descriptor record */
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}
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*mips_extra_func_info_t;
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/* It takes two values to specify a frame on the MIPS.
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In fact, the *PC* is the primary value that sets up a frame. The
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PC is looked up to see what function it's in; symbol information
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from that function tells us which register is the frame pointer
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base, and what offset from there is the "virtual frame pointer".
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(This is usually an offset from SP.) On most non-MIPS machines,
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the primary value is the SP, and the PC, if needed, disambiguates
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multiple functions with the same SP. But on the MIPS we can't do
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that since the PC is not stored in the same part of the frame every
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time. This does not seem to be a very clever way to set up frames,
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but there is nothing we can do about that. */
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#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
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extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
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/* These are defined in mdebugread.c and are used in mips-tdep.c */
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extern CORE_ADDR sigtramp_address, sigtramp_end;
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extern void fixup_sigtramp (void);
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/* Functions for dealing with MIPS16 call and return stubs. */
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#define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc)
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extern int mips_ignore_helper (CORE_ADDR pc);
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/* Definitions and declarations used by mips-tdep.c and remote-mips.c */
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#define MIPS_INSTLEN 4 /* Length of an instruction */
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#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16 */
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#define MIPS_NUMREGS 32 /* Number of integer or float registers */
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typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
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#endif /* TM_MIPS_H */
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/* Single step based on where the current instruction will take us. */
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extern void mips_software_single_step (enum target_signal, int);
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