old-cross-binutils/ld/testsuite/ld-arm/farcall-group-size2.d
Nathan Sidwell 26d97720ed gas/
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
	(encode_arm_addr_mode_2): Set default sign of zero here ...
	(encode_arm_addr_mode_3): ... and here.
	(encode_arm_cp_address): ... and here.
	(md_apply_fix): Use default sign of zero here.

	gas/testsuite/
	* gas/arm/inst.d: Adjust for signed zero offsets.
	* gas/arm/ldst-offset0.d: New test.
	* gas/arm/ldst-offset0.s: New test.
	* gas/arm/offset-1.d: New test.
	* gas/arm/offset-1.s: New test.

	ld/testsuite/
	Adjust tests for zero offset formatting.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-arm-thumb.d: Adjust.
	* ld-arm/farcall-group-size2.d: Adjust.
	* ld-arm/farcall-group.d: Adjust.
	* ld-arm/farcall-mix.d: Adjust.
	* ld-arm/farcall-mix2.d: Adjust.
	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
	* ld-arm/farcall-mixed-lib.d: Adjust.
	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-thumb.d: Adjust.
	* ld-arm/ifunc-10.dd: Adjust.
	* ld-arm/ifunc-3.dd: Adjust.
	* ld-arm/ifunc-4.dd: Adjust.
	* ld-arm/ifunc-5.dd: Adjust.
	* ld-arm/ifunc-6.dd: Adjust.
	* ld-arm/ifunc-7.dd: Adjust.
	* ld-arm/ifunc-8.dd: Adjust.
	* ld-arm/jump-reloc-veneers-long.d: Adjust.
	* ld-arm/tls-longplt-lib.d: Adjust.
	* ld-arm/tls-thumb1.d: Adjust.

	opcodes/
	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
	as address offset.
	(print_arm_address): Likewise. Elide positive  appropriately.
	(print_insn_arm): Likewise.
2011-06-02 15:32:10 +00:00

57 lines
1.4 KiB
Makefile

.*: file format .*
Disassembly of section .text:
00001000 <_start>:
1000: eb000000 bl 1008 <__bar_from_arm>
1004: eb000002 bl 1014 <__bar2_veneer>
00001008 <__bar_from_arm>:
1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8>
100c: e12fff1c bx ip
1010: 02003021 .word 0x02003021
00001014 <__bar2_veneer>:
1014: e51ff004 ldr pc, \[pc, #-4\] ; 1018 <__bar2_veneer\+0x4>
1018: 02003024 .word 0x02003024
101c: 00000000 .word 0x00000000
00001020 <myfunc>:
1020: eb000008 bl 1048 <__bar3_veneer>
1024: eb000004 bl 103c <__bar4_from_arm>
1028: eb000000 bl 1030 <__bar5_from_arm>
102c: 00000000 andeq r0, r0, r0
00001030 <__bar5_from_arm>:
1030: e59fc000 ldr ip, \[pc\] ; 1038 <__bar5_from_arm\+0x8>
1034: e12fff1c bx ip
1038: 0200302f .word 0x0200302f
0000103c <__bar4_from_arm>:
103c: e59fc000 ldr ip, \[pc\] ; 1044 <__bar4_from_arm\+0x8>
1040: e12fff1c bx ip
1044: 0200302d .word 0x0200302d
00001048 <__bar3_veneer>:
1048: e51ff004 ldr pc, \[pc, #-4\] ; 104c <__bar3_veneer\+0x4>
104c: 02003028 .word 0x02003028
...
Disassembly of section .foo:
02003020 <bar>:
2003020: 4770 bx lr
...
02003024 <bar2>:
2003024: e12fff1e bx lr
02003028 <bar3>:
2003028: e12fff1e bx lr
0200302c <bar4>:
200302c: 4770 bx lr
0200302e <bar5>:
200302e: 4770 bx lr