451 lines
8.7 KiB
C
451 lines
8.7 KiB
C
#include <signal.h>
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#include "sim-main.h"
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#include "sim-options.h"
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#include "v850_sim.h"
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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#include "bfd.h"
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define INLINE
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#endif
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#endif
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/* For compatibility */
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SIM_DESC simulator;
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/* v850 interrupt model */
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enum interrupt_type
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{
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int_reset,
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int_nmi,
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int_intov1,
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int_intp10,
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int_intp11,
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int_intp12,
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int_intp13,
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int_intcm4,
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num_int_types
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};
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char *interrupt_names[] = {
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"reset",
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"nmi",
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"intov1",
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"intp10",
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"intp11",
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"intp12",
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"intp13",
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"intcm4",
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NULL
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};
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static void
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do_interrupt (sd, data)
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SIM_DESC sd;
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void *data;
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{
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char **interrupt_name = (char**)data;
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enum interrupt_type inttype;
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inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
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/* Disable further interrupts. */
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PSW |= PSW_ID;
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/* Indicate that we're doing interrupt not exception processing. */
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PSW &= ~PSW_EP;
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if (inttype == int_reset)
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{
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PC = 0;
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PSW = 0x20;
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ECR = 0;
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/* (Might be useful to init other regs with random values.) */
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}
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else if (inttype == int_nmi)
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{
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if (PSW & PSW_NP)
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{
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/* We're already working on an NMI, so this one must wait
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around until the previous one is done. The processor
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ignores subsequent NMIs, so we don't need to count them. */
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State.pending_nmi = 1;
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}
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else
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{
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FEPC = PC;
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FEPSW = PSW;
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/* Set the FECC part of the ECR. */
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ECR &= 0x0000ffff;
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ECR |= 0x10;
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PSW |= PSW_NP;
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PC = 0x10;
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}
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}
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else
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{
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EIPC = PC;
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EIPSW = PSW;
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/* Clear the EICC part of the ECR, will set below. */
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ECR &= 0xffff0000;
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switch (inttype)
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{
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case int_intov1:
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PC = 0x80;
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ECR |= 0x80;
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break;
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case int_intp10:
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PC = 0x90;
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ECR |= 0x90;
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break;
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case int_intp11:
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PC = 0xa0;
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ECR |= 0xa0;
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break;
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case int_intp12:
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PC = 0xb0;
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ECR |= 0xb0;
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break;
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case int_intp13:
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PC = 0xc0;
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ECR |= 0xc0;
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break;
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case int_intcm4:
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PC = 0xd0;
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ECR |= 0xd0;
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break;
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default:
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/* Should never be possible. */
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abort ();
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break;
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}
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}
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}
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/* These default values correspond to expected usage for the chip. */
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int v850_debug;
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uint32 OP[4];
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static long hash PARAMS ((long));
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#if 0
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static void do_format_1_2 PARAMS ((uint32));
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static void do_format_3 PARAMS ((uint32));
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static void do_format_4 PARAMS ((uint32));
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static void do_format_5 PARAMS ((uint32));
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static void do_format_6 PARAMS ((uint32));
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static void do_format_7 PARAMS ((uint32));
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static void do_format_8 PARAMS ((uint32));
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static void do_format_9_10 PARAMS ((uint32));
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#endif
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#define MAX_HASH 63
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struct hash_entry
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{
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struct hash_entry *next;
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unsigned long opcode;
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unsigned long mask;
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struct simops *ops;
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};
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struct hash_entry hash_table[MAX_HASH+1];
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static INLINE long
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hash(insn)
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long insn;
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{
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if ( (insn & 0x0600) == 0
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|| (insn & 0x0700) == 0x0200
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|| (insn & 0x0700) == 0x0600
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|| (insn & 0x0780) == 0x0700)
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return (insn & 0x07e0) >> 5;
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if ((insn & 0x0700) == 0x0300
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|| (insn & 0x0700) == 0x0400
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|| (insn & 0x0700) == 0x0500)
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return (insn & 0x0780) >> 7;
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if ((insn & 0x07c0) == 0x0780)
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return (insn & 0x07c0) >> 6;
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return (insn & 0x07e0) >> 5;
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}
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#if 0
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static struct hash_entry *
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lookup_hash (sd, ins)
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SIM_DESC sd;
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uint32 ins;
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{
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struct hash_entry *h;
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h = &hash_table[hash(ins)];
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while ((ins & h->mask) != h->opcode)
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{
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if (h->next == NULL)
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{
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sim_io_error (sd, "ERROR looking up hash for 0x%lx, PC=0x%lx",
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(long) ins, (long) PC);
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}
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h = h->next;
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}
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return (h);
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}
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#endif
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SIM_DESC
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sim_open (kind, cb, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *cb;
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struct _bfd *abfd;
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char **argv;
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{
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SIM_DESC sd = sim_state_alloc (kind, cb);
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#if 0
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struct simops *s;
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struct hash_entry *h;
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#endif
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/* for compatibility */
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simulator = sd;
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/* FIXME: should be better way of setting up interrupts */
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STATE_WATCHPOINTS (sd)->pc = &(PC);
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STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
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STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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return 0;
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/* Allocate core managed memory */
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/* "Mirror" the ROM addresses below 1MB. */
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sim_do_commandf (sd, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
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/* Chunk of ram adjacent to rom */
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sim_do_commandf (sd, "memory region 0x100000,0x%lx", V850_LOW_END-0x100000);
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/* peripheral I/O region - mirror 1K across 4k (0x1000) */
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sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
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/* similarly if in the internal RAM region */
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sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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/* check for/establish the a reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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/* establish any remaining configuration options */
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if (sim_config (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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#if 0
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/* put all the opcodes in the hash table */
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for (s = Simops; s->func; s++)
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{
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h = &hash_table[hash(s->opcode)];
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/* go to the last entry in the chain */
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while (h->next)
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h = h->next;
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if (h->ops)
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{
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h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
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h = h->next;
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}
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h->ops = s;
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h->mask = s->mask;
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h->opcode = s->opcode;
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}
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#endif
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return sd;
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}
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void
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sim_close (sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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sim_module_uninstall (sd);
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}
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int
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sim_stop (sd)
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SIM_DESC sd;
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{
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return 0;
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}
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#if 0
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void
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sim_engine_run (sd, next_cpu_nr, siggnal)
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SIM_DESC sd;
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int next_cpu_nr;
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int siggnal;
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{
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uint32 inst;
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SIM_ADDR oldpc;
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while (1)
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{
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struct hash_entry * h;
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/* Fetch the current instruction. */
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inst = RLW (PC);
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oldpc = PC;
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h = lookup_hash (sd, inst);
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OP[0] = inst & 0x1f;
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OP[1] = (inst >> 11) & 0x1f;
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OP[2] = (inst >> 16) & 0xffff;
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OP[3] = inst;
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/* fprintf (stderr, "PC = %x, SP = %x\n", PC, SP ); */
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if (inst == 0)
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{
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fprintf (stderr, "NOP encountered!\n");
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break;
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}
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PC += h->ops->func ();
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if (oldpc == PC)
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{
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sim_io_eprintf (sd, "simulator loop at %lx\n", (long) PC );
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break;
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}
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if (sim_events_tick (sd))
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{
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sim_events_process (sd);
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}
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}
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}
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#endif
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#if 0
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int
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sim_trace (sd)
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SIM_DESC sd;
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{
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#ifdef DEBUG
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v850_debug = DEBUG;
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#endif
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sim_resume (sd, 0, 0);
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return 1;
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}
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#endif
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void
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sim_info (sd, verbose)
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SIM_DESC sd;
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int verbose;
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{
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profile_print (sd, STATE_VERBOSE_P (sd), NULL, NULL);
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}
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SIM_RC
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sim_create_inferior (sd, prog_bfd, argv, env)
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SIM_DESC sd;
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struct _bfd *prog_bfd;
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char **argv;
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char **env;
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{
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memset (&State, 0, sizeof (State));
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if (prog_bfd != NULL)
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PC = bfd_get_start_address (prog_bfd);
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/* start-sanitize-v850eq */
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/* For v850eq, set PSW[US] by default */
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if (STATE_ARCHITECTURE (sd) != NULL
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&& STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850
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&& STATE_ARCHITECTURE (sd)->mach == bfd_mach_v850eq)
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PSW |= PSW_US;
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/* end-sanitize-v850eq */
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return SIM_RC_OK;
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}
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void
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sim_fetch_register (sd, rn, memory)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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{
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*(unsigned32*)memory = H2T_4 (State.regs[rn]);
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}
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void
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sim_store_register (sd, rn, memory)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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{
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State.regs[rn] = T2H_4 (*(unsigned32*)memory);
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}
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void
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sim_do_command (sd, cmd)
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SIM_DESC sd;
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char *cmd;
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{
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char *mm_cmd = "memory-map";
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char *int_cmd = "interrupt";
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if (sim_args_command (sd, cmd) != SIM_RC_OK)
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{
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if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
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sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
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else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
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sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
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else
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sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
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}
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}
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