19e8f41aa4
* config/tc-xtensa.c (xtensa_j_opcode): New. (xg_instruction_matches_option_term): Handle "FREEREG" option. (xg_build_to_insn): Likewise. Update renamed tls_reloc reference. (md_begin): Initialize xtensa_j_opcode. (md_assemble): Update renamed tls_reloc reference. Handle "j.l". (xg_assemble_vliw_tokens): Save free_reg info in the frag. (tinsn_immed_from_frag): Get free_reg info back out of the frag. (vinsn_to_insnbuf): Update renamed tls_reloc references. Distinguish extra argument for "FREEREG" from extra TLS argument. * config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field. * config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc field to extra_arg. * config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l". (build_transition): Handle "FREEREG" operand. * config/xtensa-relax.h (enum op_type): Add OP_FREEREG. 2008-11-04 Bob Wilson <bob.wilson@acm.org> * gas/xtensa/all.exp: Run jlong test. * gas/xtensa/jlong.d: New. * gas/xtensa/jlong.s: New.
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/* Declarations for stacks of tokenized Xtensa instructions.
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Copyright (C) 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef XTENSA_ISTACK_H
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#define XTENSA_ISTACK_H
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#include "xtensa-isa.h"
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#define MAX_ISTACK 12
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#define MAX_INSN_ARGS 64
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enum itype_enum
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{
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ITYPE_INSN,
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ITYPE_LITERAL,
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ITYPE_LABEL
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};
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/* Literals have 1 token and no opcode.
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Labels have 1 token and no opcode. */
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typedef struct tinsn_struct
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{
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enum itype_enum insn_type;
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xtensa_opcode opcode; /* Literals have an invalid opcode. */
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bfd_boolean is_specific_opcode;
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bfd_boolean keep_wide;
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int ntok;
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expressionS tok[MAX_INSN_ARGS];
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bfd_boolean loc_directive_seen;
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struct dwarf2_line_info debug_line;
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/* This field is used for two types of special pseudo ops:
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1. TLS-related operations. Eg: callx8.tls
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2. j.l label, a2
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For the tls-related operations, it will hold a tls-related opcode
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and info to be used in a fixup. For j.l it will hold a
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register to be used during relaxation. */
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expressionS extra_arg;
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/* Filled out by relaxation_requirements: */
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enum xtensa_relax_statesE subtype;
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int literal_space;
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/* Filled out by vinsn_to_insnbuf: */
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symbolS *symbol;
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offsetT offset;
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fragS *literal_frag;
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} TInsn;
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/* tinsn_stack: This is a stack of instructions to be placed. */
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typedef struct tinsn_stack
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{
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int ninsn;
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TInsn insn[MAX_ISTACK];
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} IStack;
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void istack_init (IStack *);
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bfd_boolean istack_empty (IStack *);
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bfd_boolean istack_full (IStack *);
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TInsn *istack_top (IStack *);
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void istack_push (IStack *, TInsn *);
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TInsn *istack_push_space (IStack *);
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void istack_pop (IStack *);
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/* TInsn utilities. */
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void tinsn_init (TInsn *);
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/* vliw_insn: bundles of TInsns. */
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typedef struct vliw_insn
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{
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xtensa_format format;
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int num_slots;
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unsigned int inside_bundle;
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TInsn slots[MAX_SLOTS];
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xtensa_insnbuf insnbuf;
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xtensa_insnbuf slotbuf[MAX_SLOTS];
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} vliw_insn;
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#endif /* !XTENSA_ISTACK_H */
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