1dbcd68cf1
2013-11-20 Walfred Tedeschi <walfred.tedeschi@intel.com> * i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Add MPX registers on the range of registers to be read from xsave buffer. (i386_linux_read_description): Add case for MPX. * i386-linux-tdep.c: Include features/i386/i386-mpx-linux.c. (i386_linux_gregset_reg_offset): Add MPX registers. (i386_linux_core_read_description): Initialize also MPX. (_initialize_i386_linux_tdep): Add mpx initialization. * i386-tdep.h (gdbarch_tdep): Add fields bnd0r_regnum, bnd0_regnum, mpx_register_names. (i386_regnum): Add MPX registers. (I386_MPX_NUM_REGS): New macro. (i386_bnd_regnum_p): New function. * i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set number of registers to be the number of BNDSTATUS. (tdesc_i386_mpx_linux): Add description for MPX Linux registers. * i386-tdep.c: Include features/i386/i386-mpx.c. (i386_mpx_names): Add MPX register names array. (i386_bnd_names): Add bnd pseudo register names array. (i386_bndr_regnum_p): Lookup register numbers for bnd raw registers. (i386_bndr_regnum_p): Lookup register numbers for bnd raw registers. (386_mpx_ctrl_regnum_p): Lookup register numbers for MPX control registers. (i386_bnd_type): New function. (i386_pseudo_register_type): Use i386_bnd_type for bnd pseudo register types. (i386_pseudo_register_read_into_value): Add bnd case. (i386_pseudo_register_write): Add bnd pseudo registers. (i386_register_reggroup_p): Add MPX register to the group all. (i386_validate_tdesc_p): Add MPX to the target description validation. (i386_pseudo_register_name): Add bnd pseudo registers. (i386_gdbarch_init): Add MPX for architecture initialization. (_initia_initialize_i386_tdep): Add mpx initialization. * i387-tdep.c (xsave_mpx_offset): New vector for MPX offsets on XSAVE buffer. (XSAVE_MPX_ADDR): New macro. (i387_supply_xsave): Add MPX case. (i387_collect_xsave): Add MPX case. * i387-tdep.h (I387_BND0R_REGNUM): New macro. (I387_BNDCFGU_REGNUM): New macro. (I387_NUM_MPX_REGS): New macro. (I387_NUM_BND_REGS): New macro. (I387_NUM_MPX_CTRL_REGS): New macro. (I387_MPXEND_REGNUM): New macro. * common/i386-xstate.h (I386_XSTATE_BNDREGS): New macro. (I386_XSTATE_BNDCFG): Likewise. (I386_XSTATE_MPX_MASK): Likewise. (I386_XSTATE_ALL_MASK): New macro represents flags for all states. (I386_XSTATE_BNDREGS_SIZE): New macro. (I386_XSTATE_BNDCFG_SIZE): Likewise. (I386_XSTATE_SIZE): Adapt for MPX. (I386_XSTATE_MAX_SIZE): Likewise. Change-Id: I9ddb7d49434d86fa18eb6b99515203d7c567aefd Signed-off-by: Walfred Tedeschi <walfred.tedeschi@intel.com> Conflicts: gdb/ChangeLog
1411 lines
38 KiB
C
1411 lines
38 KiB
C
/* Intel 387 floating point stuff.
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Copyright (C) 1988-2013 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "doublest.h"
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#include "floatformat.h"
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#include "frame.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "language.h"
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#include "regcache.h"
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#include "value.h"
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#include "gdb_assert.h"
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#include <string.h>
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#include "i386-tdep.h"
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#include "i387-tdep.h"
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#include "i386-xstate.h"
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/* Print the floating point number specified by RAW. */
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static void
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print_i387_value (struct gdbarch *gdbarch,
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const gdb_byte *raw, struct ui_file *file)
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{
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DOUBLEST value;
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/* Using extract_typed_floating here might affect the representation
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of certain numbers such as NaNs, even if GDB is running natively.
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This is fine since our caller already detects such special
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numbers and we print the hexadecimal representation anyway. */
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value = extract_typed_floating (raw, i387_ext_type (gdbarch));
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/* We try to print 19 digits. The last digit may or may not contain
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garbage, but we'd better print one too many. We need enough room
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to print the value, 1 position for the sign, 1 for the decimal
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point, 19 for the digits and 6 for the exponent adds up to 27. */
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#ifdef PRINTF_HAS_LONG_DOUBLE
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fprintf_filtered (file, " %-+27.19Lg", (long double) value);
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#else
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fprintf_filtered (file, " %-+27.19g", (double) value);
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#endif
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}
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/* Print the classification for the register contents RAW. */
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static void
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print_i387_ext (struct gdbarch *gdbarch,
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const gdb_byte *raw, struct ui_file *file)
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{
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int sign;
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int integer;
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unsigned int exponent;
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unsigned long fraction[2];
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sign = raw[9] & 0x80;
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integer = raw[7] & 0x80;
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exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
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fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
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fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
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| (raw[5] << 8) | raw[4]);
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if (exponent == 0x7fff && integer)
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{
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if (fraction[0] == 0x00000000 && fraction[1] == 0x00000000)
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/* Infinity. */
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fprintf_filtered (file, " %cInf", (sign ? '-' : '+'));
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else if (sign && fraction[0] == 0x00000000 && fraction[1] == 0x40000000)
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/* Real Indefinite (QNaN). */
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fputs_unfiltered (" Real Indefinite (QNaN)", file);
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else if (fraction[1] & 0x40000000)
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/* QNaN. */
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fputs_filtered (" QNaN", file);
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else
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/* SNaN. */
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fputs_filtered (" SNaN", file);
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}
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else if (exponent < 0x7fff && exponent > 0x0000 && integer)
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/* Normal. */
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print_i387_value (gdbarch, raw, file);
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else if (exponent == 0x0000)
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{
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/* Denormal or zero. */
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print_i387_value (gdbarch, raw, file);
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if (integer)
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/* Pseudo-denormal. */
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fputs_filtered (" Pseudo-denormal", file);
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else if (fraction[0] || fraction[1])
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/* Denormal. */
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fputs_filtered (" Denormal", file);
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}
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else
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/* Unsupported. */
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fputs_filtered (" Unsupported", file);
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}
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/* Print the status word STATUS. If STATUS_P is false, then STATUS
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was unavailable. */
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static void
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print_i387_status_word (int status_p,
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unsigned int status, struct ui_file *file)
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{
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fprintf_filtered (file, "Status Word: ");
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if (!status_p)
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{
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fprintf_filtered (file, "%s\n", _("<unavailable>"));
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return;
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}
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fprintf_filtered (file, "%s", hex_string_custom (status, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0001) ? "IE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0002) ? "DE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0004) ? "ZE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0008) ? "OE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0010) ? "UE" : " ");
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fprintf_filtered (file, " %s", (status & 0x0020) ? "PE" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0080) ? "ES" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0040) ? "SF" : " ");
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (status & 0x0100) ? "C0" : " ");
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fprintf_filtered (file, " %s", (status & 0x0200) ? "C1" : " ");
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fprintf_filtered (file, " %s", (status & 0x0400) ? "C2" : " ");
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fprintf_filtered (file, " %s", (status & 0x4000) ? "C3" : " ");
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fputs_filtered ("\n", file);
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fprintf_filtered (file,
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" TOP: %d\n", ((status >> 11) & 7));
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}
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/* Print the control word CONTROL. If CONTROL_P is false, then
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CONTROL was unavailable. */
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static void
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print_i387_control_word (int control_p,
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unsigned int control, struct ui_file *file)
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{
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fprintf_filtered (file, "Control Word: ");
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if (!control_p)
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{
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fprintf_filtered (file, "%s\n", _("<unavailable>"));
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return;
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}
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fprintf_filtered (file, "%s", hex_string_custom (control, 4));
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fputs_filtered (" ", file);
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fprintf_filtered (file, " %s", (control & 0x0001) ? "IM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0002) ? "DM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0004) ? "ZM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0008) ? "OM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0010) ? "UM" : " ");
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fprintf_filtered (file, " %s", (control & 0x0020) ? "PM" : " ");
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fputs_filtered ("\n", file);
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fputs_filtered (" PC: ", file);
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switch ((control >> 8) & 3)
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{
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case 0:
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fputs_filtered ("Single Precision (24-bits)\n", file);
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break;
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case 1:
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fputs_filtered ("Reserved\n", file);
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break;
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case 2:
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fputs_filtered ("Double Precision (53-bits)\n", file);
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break;
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case 3:
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fputs_filtered ("Extended Precision (64-bits)\n", file);
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break;
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}
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fputs_filtered (" RC: ", file);
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switch ((control >> 10) & 3)
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{
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case 0:
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fputs_filtered ("Round to nearest\n", file);
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break;
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case 1:
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fputs_filtered ("Round down\n", file);
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break;
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case 2:
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fputs_filtered ("Round up\n", file);
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break;
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case 3:
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fputs_filtered ("Round toward zero\n", file);
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break;
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}
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}
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/* Print out the i387 floating point state. Note that we ignore FRAME
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in the code below. That's OK since floating-point registers are
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never saved on the stack. */
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void
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i387_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
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struct frame_info *frame, const char *args)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
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ULONGEST fctrl;
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int fctrl_p;
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ULONGEST fstat;
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int fstat_p;
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ULONGEST ftag;
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int ftag_p;
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ULONGEST fiseg;
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int fiseg_p;
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ULONGEST fioff;
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int fioff_p;
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ULONGEST foseg;
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int foseg_p;
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ULONGEST fooff;
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int fooff_p;
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ULONGEST fop;
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int fop_p;
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int fpreg;
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int top;
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gdb_assert (gdbarch == get_frame_arch (frame));
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fctrl_p = read_frame_register_unsigned (frame,
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I387_FCTRL_REGNUM (tdep), &fctrl);
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fstat_p = read_frame_register_unsigned (frame,
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I387_FSTAT_REGNUM (tdep), &fstat);
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ftag_p = read_frame_register_unsigned (frame,
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I387_FTAG_REGNUM (tdep), &ftag);
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fiseg_p = read_frame_register_unsigned (frame,
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I387_FISEG_REGNUM (tdep), &fiseg);
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fioff_p = read_frame_register_unsigned (frame,
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I387_FIOFF_REGNUM (tdep), &fioff);
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foseg_p = read_frame_register_unsigned (frame,
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I387_FOSEG_REGNUM (tdep), &foseg);
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fooff_p = read_frame_register_unsigned (frame,
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I387_FOOFF_REGNUM (tdep), &fooff);
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fop_p = read_frame_register_unsigned (frame,
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I387_FOP_REGNUM (tdep), &fop);
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if (fstat_p)
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{
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top = ((fstat >> 11) & 7);
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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struct value *regval;
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int regnum;
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int i;
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int tag = -1;
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fprintf_filtered (file, "%sR%d: ", fpreg == top ? "=>" : " ", fpreg);
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if (ftag_p)
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{
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tag = (ftag >> (fpreg * 2)) & 3;
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switch (tag)
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{
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case 0:
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fputs_filtered ("Valid ", file);
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break;
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case 1:
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fputs_filtered ("Zero ", file);
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break;
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case 2:
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fputs_filtered ("Special ", file);
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break;
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case 3:
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fputs_filtered ("Empty ", file);
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break;
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}
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}
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else
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fputs_filtered ("Unknown ", file);
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regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep);
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regval = get_frame_register_value (frame, regnum);
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if (value_entirely_available (regval))
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{
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const gdb_byte *raw = value_contents (regval);
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fputs_filtered ("0x", file);
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for (i = 9; i >= 0; i--)
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fprintf_filtered (file, "%02x", raw[i]);
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if (tag != -1 && tag != 3)
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print_i387_ext (gdbarch, raw, file);
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}
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else
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fprintf_filtered (file, "%s", _("<unavailable>"));
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fputs_filtered ("\n", file);
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}
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}
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fputs_filtered ("\n", file);
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print_i387_status_word (fstat_p, fstat, file);
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print_i387_control_word (fctrl_p, fctrl, file);
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fprintf_filtered (file, "Tag Word: %s\n",
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ftag_p ? hex_string_custom (ftag, 4) : _("<unavailable>"));
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fprintf_filtered (file, "Instruction Pointer: %s:",
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fiseg_p ? hex_string_custom (fiseg, 2) : _("<unavailable>"));
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fprintf_filtered (file, "%s\n",
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fioff_p ? hex_string_custom (fioff, 8) : _("<unavailable>"));
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fprintf_filtered (file, "Operand Pointer: %s:",
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foseg_p ? hex_string_custom (foseg, 2) : _("<unavailable>"));
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fprintf_filtered (file, "%s\n",
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fooff_p ? hex_string_custom (fooff, 8) : _("<unavailable>"));
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fprintf_filtered (file, "Opcode: %s\n",
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fop_p
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? (hex_string_custom (fop ? (fop | 0xd800) : 0, 4))
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: _("<unavailable>"));
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}
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/* Return nonzero if a value of type TYPE stored in register REGNUM
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needs any special handling. */
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int
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i387_convert_register_p (struct gdbarch *gdbarch, int regnum,
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struct type *type)
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{
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if (i386_fp_regnum_p (gdbarch, regnum))
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{
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/* Floating point registers must be converted unless we are
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accessing them in their hardware type. */
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if (type == i387_ext_type (gdbarch))
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return 0;
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else
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return 1;
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}
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return 0;
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}
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/* Read a value of type TYPE from register REGNUM in frame FRAME, and
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return its contents in TO. */
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int
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i387_register_to_value (struct frame_info *frame, int regnum,
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struct type *type, gdb_byte *to,
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int *optimizedp, int *unavailablep)
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{
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struct gdbarch *gdbarch = get_frame_arch (frame);
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gdb_byte from[I386_MAX_REGISTER_SIZE];
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gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
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/* We only support floating-point values. */
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if (TYPE_CODE (type) != TYPE_CODE_FLT)
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{
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warning (_("Cannot convert floating-point register value "
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"to non-floating-point type."));
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*optimizedp = *unavailablep = 0;
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return 0;
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}
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/* Convert to TYPE. */
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if (!get_frame_register_bytes (frame, regnum, 0, TYPE_LENGTH (type),
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from, optimizedp, unavailablep))
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return 0;
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convert_typed_floating (from, i387_ext_type (gdbarch), to, type);
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*optimizedp = *unavailablep = 0;
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return 1;
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}
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/* Write the contents FROM of a value of type TYPE into register
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REGNUM in frame FRAME. */
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void
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i387_value_to_register (struct frame_info *frame, int regnum,
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struct type *type, const gdb_byte *from)
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{
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struct gdbarch *gdbarch = get_frame_arch (frame);
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gdb_byte to[I386_MAX_REGISTER_SIZE];
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gdb_assert (i386_fp_regnum_p (gdbarch, regnum));
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/* We only support floating-point values. */
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if (TYPE_CODE (type) != TYPE_CODE_FLT)
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{
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warning (_("Cannot convert non-floating-point type "
|
||
"to floating-point register value."));
|
||
return;
|
||
}
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||
|
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/* Convert from TYPE. */
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convert_typed_floating (from, type, to, i387_ext_type (gdbarch));
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put_frame_register (frame, regnum, to);
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||
}
|
||
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||
|
||
/* Handle FSAVE and FXSAVE formats. */
|
||
|
||
/* At fsave_offset[REGNUM] you'll find the offset to the location in
|
||
the data structure used by the "fsave" instruction where GDB
|
||
register REGNUM is stored. */
|
||
|
||
static int fsave_offset[] =
|
||
{
|
||
28 + 0 * 10, /* %st(0) ... */
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28 + 1 * 10,
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28 + 2 * 10,
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28 + 3 * 10,
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28 + 4 * 10,
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28 + 5 * 10,
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28 + 6 * 10,
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28 + 7 * 10, /* ... %st(7). */
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||
0, /* `fctrl' (16 bits). */
|
||
4, /* `fstat' (16 bits). */
|
||
8, /* `ftag' (16 bits). */
|
||
16, /* `fiseg' (16 bits). */
|
||
12, /* `fioff'. */
|
||
24, /* `foseg' (16 bits). */
|
||
20, /* `fooff'. */
|
||
18 /* `fop' (bottom 11 bits). */
|
||
};
|
||
|
||
#define FSAVE_ADDR(tdep, fsave, regnum) \
|
||
(fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
|
||
|
||
|
||
/* Fill register REGNUM in REGCACHE with the appropriate value from
|
||
*FSAVE. This function masks off any of the reserved bits in
|
||
*FSAVE. */
|
||
|
||
void
|
||
i387_supply_fsave (struct regcache *regcache, int regnum, const void *fsave)
|
||
{
|
||
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
const gdb_byte *regs = fsave;
|
||
int i;
|
||
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
|
||
for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
if (fsave == NULL)
|
||
{
|
||
regcache_raw_supply (regcache, i, NULL);
|
||
continue;
|
||
}
|
||
|
||
/* Most of the FPU control registers occupy only 16 bits in the
|
||
fsave area. Give those a special treatment. */
|
||
if (i >= I387_FCTRL_REGNUM (tdep)
|
||
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte val[4];
|
||
|
||
memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
|
||
val[2] = val[3] = 0;
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
val[1] &= ((1 << 3) - 1);
|
||
regcache_raw_supply (regcache, i, val);
|
||
}
|
||
else
|
||
regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
|
||
/* Provide dummy values for the SSE registers. */
|
||
for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
regcache_raw_supply (regcache, i, NULL);
|
||
if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
store_unsigned_integer (buf, 4, byte_order, 0x1f80);
|
||
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
|
||
}
|
||
}
|
||
|
||
/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
|
||
with the value from REGCACHE. If REGNUM is -1, do this for all
|
||
registers. This function doesn't touch any of the reserved bits in
|
||
*FSAVE. */
|
||
|
||
void
|
||
i387_collect_fsave (const struct regcache *regcache, int regnum, void *fsave)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
||
gdb_byte *regs = fsave;
|
||
int i;
|
||
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
|
||
for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
/* Most of the FPU control registers occupy only 16 bits in
|
||
the fsave area. Give those a special treatment. */
|
||
if (i >= I387_FCTRL_REGNUM (tdep)
|
||
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
regcache_raw_collect (regcache, i, buf);
|
||
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
{
|
||
/* The opcode occupies only 11 bits. Make sure we
|
||
don't touch the other bits. */
|
||
buf[1] &= ((1 << 3) - 1);
|
||
buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
||
}
|
||
memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
|
||
}
|
||
else
|
||
regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
|
||
|
||
/* At fxsave_offset[REGNUM] you'll find the offset to the location in
|
||
the data structure used by the "fxsave" instruction where GDB
|
||
register REGNUM is stored. */
|
||
|
||
static int fxsave_offset[] =
|
||
{
|
||
32, /* %st(0) through ... */
|
||
48,
|
||
64,
|
||
80,
|
||
96,
|
||
112,
|
||
128,
|
||
144, /* ... %st(7) (80 bits each). */
|
||
0, /* `fctrl' (16 bits). */
|
||
2, /* `fstat' (16 bits). */
|
||
4, /* `ftag' (16 bits). */
|
||
12, /* `fiseg' (16 bits). */
|
||
8, /* `fioff'. */
|
||
20, /* `foseg' (16 bits). */
|
||
16, /* `fooff'. */
|
||
6, /* `fop' (bottom 11 bits). */
|
||
160 + 0 * 16, /* %xmm0 through ... */
|
||
160 + 1 * 16,
|
||
160 + 2 * 16,
|
||
160 + 3 * 16,
|
||
160 + 4 * 16,
|
||
160 + 5 * 16,
|
||
160 + 6 * 16,
|
||
160 + 7 * 16,
|
||
160 + 8 * 16,
|
||
160 + 9 * 16,
|
||
160 + 10 * 16,
|
||
160 + 11 * 16,
|
||
160 + 12 * 16,
|
||
160 + 13 * 16,
|
||
160 + 14 * 16,
|
||
160 + 15 * 16, /* ... %xmm15 (128 bits each). */
|
||
};
|
||
|
||
#define FXSAVE_ADDR(tdep, fxsave, regnum) \
|
||
(fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
|
||
|
||
/* We made an unfortunate choice in putting %mxcsr after the SSE
|
||
registers %xmm0-%xmm7 instead of before, since it makes supporting
|
||
the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
|
||
don't include the offset for %mxcsr here above. */
|
||
|
||
#define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
|
||
|
||
static int i387_tag (const gdb_byte *raw);
|
||
|
||
|
||
/* Fill register REGNUM in REGCACHE with the appropriate
|
||
floating-point or SSE register value from *FXSAVE. This function
|
||
masks off any of the reserved bits in *FXSAVE. */
|
||
|
||
void
|
||
i387_supply_fxsave (struct regcache *regcache, int regnum, const void *fxsave)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
||
const gdb_byte *regs = fxsave;
|
||
int i;
|
||
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
gdb_assert (tdep->num_xmm_regs > 0);
|
||
|
||
for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
if (regs == NULL)
|
||
{
|
||
regcache_raw_supply (regcache, i, NULL);
|
||
continue;
|
||
}
|
||
|
||
/* Most of the FPU control registers occupy only 16 bits in
|
||
the fxsave area. Give those a special treatment. */
|
||
if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
|
||
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte val[4];
|
||
|
||
memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
|
||
val[2] = val[3] = 0;
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
val[1] &= ((1 << 3) - 1);
|
||
else if (i== I387_FTAG_REGNUM (tdep))
|
||
{
|
||
/* The fxsave area contains a simplified version of
|
||
the tag word. We have to look at the actual 80-bit
|
||
FP data to recreate the traditional i387 tag word. */
|
||
|
||
unsigned long ftag = 0;
|
||
int fpreg;
|
||
int top;
|
||
|
||
top = ((FXSAVE_ADDR (tdep, regs,
|
||
I387_FSTAT_REGNUM (tdep)))[1] >> 3);
|
||
top &= 0x7;
|
||
|
||
for (fpreg = 7; fpreg >= 0; fpreg--)
|
||
{
|
||
int tag;
|
||
|
||
if (val[0] & (1 << fpreg))
|
||
{
|
||
int thisreg = (fpreg + 8 - top) % 8
|
||
+ I387_ST0_REGNUM (tdep);
|
||
tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
|
||
}
|
||
else
|
||
tag = 3; /* Empty */
|
||
|
||
ftag |= tag << (2 * fpreg);
|
||
}
|
||
val[0] = ftag & 0xff;
|
||
val[1] = (ftag >> 8) & 0xff;
|
||
}
|
||
regcache_raw_supply (regcache, i, val);
|
||
}
|
||
else
|
||
regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
|
||
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
||
{
|
||
if (regs == NULL)
|
||
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
|
||
else
|
||
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
|
||
FXSAVE_MXCSR_ADDR (regs));
|
||
}
|
||
}
|
||
|
||
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
||
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
||
all registers. This function doesn't touch any of the reserved
|
||
bits in *FXSAVE. */
|
||
|
||
void
|
||
i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
||
gdb_byte *regs = fxsave;
|
||
int i;
|
||
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
gdb_assert (tdep->num_xmm_regs > 0);
|
||
|
||
for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
/* Most of the FPU control registers occupy only 16 bits in
|
||
the fxsave area. Give those a special treatment. */
|
||
if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
|
||
&& i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
regcache_raw_collect (regcache, i, buf);
|
||
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
{
|
||
/* The opcode occupies only 11 bits. Make sure we
|
||
don't touch the other bits. */
|
||
buf[1] &= ((1 << 3) - 1);
|
||
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
||
}
|
||
else if (i == I387_FTAG_REGNUM (tdep))
|
||
{
|
||
/* Converting back is much easier. */
|
||
|
||
unsigned short ftag;
|
||
int fpreg;
|
||
|
||
ftag = (buf[1] << 8) | buf[0];
|
||
buf[0] = 0;
|
||
buf[1] = 0;
|
||
|
||
for (fpreg = 7; fpreg >= 0; fpreg--)
|
||
{
|
||
int tag = (ftag >> (fpreg * 2)) & 3;
|
||
|
||
if (tag != 3)
|
||
buf[0] |= (1 << fpreg);
|
||
}
|
||
}
|
||
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
|
||
}
|
||
else
|
||
regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
|
||
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
||
regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
|
||
FXSAVE_MXCSR_ADDR (regs));
|
||
}
|
||
|
||
/* `xstate_bv' is at byte offset 512. */
|
||
#define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
|
||
|
||
/* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
|
||
the upper 128bit of AVX register data structure used by the "xsave"
|
||
instruction where GDB register REGNUM is stored. */
|
||
|
||
static int xsave_avxh_offset[] =
|
||
{
|
||
576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
|
||
576 + 1 * 16,
|
||
576 + 2 * 16,
|
||
576 + 3 * 16,
|
||
576 + 4 * 16,
|
||
576 + 5 * 16,
|
||
576 + 6 * 16,
|
||
576 + 7 * 16,
|
||
576 + 8 * 16,
|
||
576 + 9 * 16,
|
||
576 + 10 * 16,
|
||
576 + 11 * 16,
|
||
576 + 12 * 16,
|
||
576 + 13 * 16,
|
||
576 + 14 * 16,
|
||
576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
|
||
};
|
||
|
||
static int xsave_mpx_offset[] =
|
||
{
|
||
960 + 0 * 16, /* bnd0r...bnd3r registers. */
|
||
960 + 1 * 16,
|
||
960 + 2 * 16,
|
||
960 + 3 * 16,
|
||
1024 + 0 * 8, /* bndcfg ... bndstatus. */
|
||
1024 + 1 * 8,
|
||
};
|
||
|
||
#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
|
||
(xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
|
||
|
||
#define XSAVE_MPX_ADDR(tdep, xsave, regnum) \
|
||
(xsave + xsave_mpx_offset[regnum - I387_BND0R_REGNUM (tdep)])
|
||
|
||
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
|
||
|
||
void
|
||
i387_supply_xsave (struct regcache *regcache, int regnum,
|
||
const void *xsave)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
||
const gdb_byte *regs = xsave;
|
||
int i;
|
||
unsigned int clear_bv;
|
||
static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 };
|
||
enum
|
||
{
|
||
none = 0x0,
|
||
x87 = 0x1,
|
||
sse = 0x2,
|
||
avxh = 0x4,
|
||
mpx = 0x8,
|
||
all = x87 | sse | avxh | mpx
|
||
} regclass;
|
||
|
||
gdb_assert (regs != NULL);
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
gdb_assert (tdep->num_xmm_regs > 0);
|
||
|
||
if (regnum == -1)
|
||
regclass = all;
|
||
else if (regnum >= I387_YMM0H_REGNUM (tdep)
|
||
&& regnum < I387_YMMENDH_REGNUM (tdep))
|
||
regclass = avxh;
|
||
else if (regnum >= I387_BND0R_REGNUM (tdep)
|
||
&& regnum < I387_MPXEND_REGNUM (tdep))
|
||
regclass = mpx;
|
||
else if (regnum >= I387_XMM0_REGNUM(tdep)
|
||
&& regnum < I387_MXCSR_REGNUM (tdep))
|
||
regclass = sse;
|
||
else if (regnum >= I387_ST0_REGNUM (tdep)
|
||
&& regnum < I387_FCTRL_REGNUM (tdep))
|
||
regclass = x87;
|
||
else
|
||
regclass = none;
|
||
|
||
if (regclass != none)
|
||
{
|
||
/* Get `xstat_bv'. */
|
||
const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
|
||
|
||
/* The supported bits in `xstat_bv' are 1 byte. Clear part in
|
||
vector registers if its bit in xstat_bv is zero. */
|
||
clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
|
||
}
|
||
else
|
||
clear_bv = I386_XSTATE_ALL_MASK;
|
||
|
||
/* With the delayed xsave mechanism, in between the program
|
||
starting, and the program accessing the vector registers for the
|
||
first time, the register's values are invalid. The kernel
|
||
initializes register states to zero when they are set the first
|
||
time in a program. This means that from the user-space programs'
|
||
perspective, it's the same as if the registers have always been
|
||
zero from the start of the program. Therefore, the debugger
|
||
should provide the same illusion to the user. */
|
||
|
||
switch (regclass)
|
||
{
|
||
case none:
|
||
break;
|
||
|
||
case avxh:
|
||
if ((clear_bv & I386_XSTATE_AVX))
|
||
regcache_raw_supply (regcache, regnum, zero);
|
||
else
|
||
regcache_raw_supply (regcache, regnum,
|
||
XSAVE_AVXH_ADDR (tdep, regs, regnum));
|
||
return;
|
||
|
||
case mpx:
|
||
if ((clear_bv & I386_XSTATE_BNDREGS))
|
||
regcache_raw_supply (regcache, regnum, zero);
|
||
else
|
||
regcache_raw_supply (regcache, regnum,
|
||
XSAVE_MPX_ADDR (tdep, regs, regnum));
|
||
return;
|
||
|
||
case sse:
|
||
if ((clear_bv & I386_XSTATE_SSE))
|
||
regcache_raw_supply (regcache, regnum, zero);
|
||
else
|
||
regcache_raw_supply (regcache, regnum,
|
||
FXSAVE_ADDR (tdep, regs, regnum));
|
||
return;
|
||
|
||
case x87:
|
||
if ((clear_bv & I386_XSTATE_X87))
|
||
regcache_raw_supply (regcache, regnum, zero);
|
||
else
|
||
regcache_raw_supply (regcache, regnum,
|
||
FXSAVE_ADDR (tdep, regs, regnum));
|
||
return;
|
||
|
||
case all:
|
||
/* Handle the upper YMM registers. */
|
||
if ((tdep->xcr0 & I386_XSTATE_AVX))
|
||
{
|
||
if ((clear_bv & I386_XSTATE_AVX))
|
||
{
|
||
for (i = I387_YMM0H_REGNUM (tdep);
|
||
i < I387_YMMENDH_REGNUM (tdep);
|
||
i++)
|
||
regcache_raw_supply (regcache, i, zero);
|
||
}
|
||
else
|
||
{
|
||
for (i = I387_YMM0H_REGNUM (tdep);
|
||
i < I387_YMMENDH_REGNUM (tdep);
|
||
i++)
|
||
regcache_raw_supply (regcache, i,
|
||
XSAVE_AVXH_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
|
||
/* Handle the MPX registers. */
|
||
if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
|
||
{
|
||
if (clear_bv & I386_XSTATE_BNDREGS)
|
||
{
|
||
for (i = I387_BND0R_REGNUM (tdep);
|
||
i < I387_BNDCFGU_REGNUM (tdep); i++)
|
||
regcache_raw_supply (regcache, i, zero);
|
||
}
|
||
else
|
||
{
|
||
for (i = I387_BND0R_REGNUM (tdep);
|
||
i < I387_BNDCFGU_REGNUM (tdep); i++)
|
||
regcache_raw_supply (regcache, i,
|
||
XSAVE_MPX_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
|
||
/* Handle the MPX registers. */
|
||
if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
|
||
{
|
||
if (clear_bv & I386_XSTATE_BNDCFG)
|
||
{
|
||
for (i = I387_BNDCFGU_REGNUM (tdep);
|
||
i < I387_MPXEND_REGNUM (tdep); i++)
|
||
regcache_raw_supply (regcache, i, zero);
|
||
}
|
||
else
|
||
{
|
||
for (i = I387_BNDCFGU_REGNUM (tdep);
|
||
i < I387_MPXEND_REGNUM (tdep); i++)
|
||
regcache_raw_supply (regcache, i,
|
||
XSAVE_MPX_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
|
||
/* Handle the XMM registers. */
|
||
if ((tdep->xcr0 & I386_XSTATE_SSE))
|
||
{
|
||
if ((clear_bv & I386_XSTATE_SSE))
|
||
{
|
||
for (i = I387_XMM0_REGNUM (tdep);
|
||
i < I387_MXCSR_REGNUM (tdep);
|
||
i++)
|
||
regcache_raw_supply (regcache, i, zero);
|
||
}
|
||
else
|
||
{
|
||
for (i = I387_XMM0_REGNUM (tdep);
|
||
i < I387_MXCSR_REGNUM (tdep); i++)
|
||
regcache_raw_supply (regcache, i,
|
||
FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
|
||
/* Handle the x87 registers. */
|
||
if ((tdep->xcr0 & I386_XSTATE_X87))
|
||
{
|
||
if ((clear_bv & I386_XSTATE_X87))
|
||
{
|
||
for (i = I387_ST0_REGNUM (tdep);
|
||
i < I387_FCTRL_REGNUM (tdep);
|
||
i++)
|
||
regcache_raw_supply (regcache, i, zero);
|
||
}
|
||
else
|
||
{
|
||
for (i = I387_ST0_REGNUM (tdep);
|
||
i < I387_FCTRL_REGNUM (tdep);
|
||
i++)
|
||
regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
}
|
||
break;
|
||
}
|
||
|
||
/* Only handle x87 control registers. */
|
||
for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
/* Most of the FPU control registers occupy only 16 bits in
|
||
the xsave extended state. Give those a special treatment. */
|
||
if (i != I387_FIOFF_REGNUM (tdep)
|
||
&& i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte val[4];
|
||
|
||
memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
|
||
val[2] = val[3] = 0;
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
val[1] &= ((1 << 3) - 1);
|
||
else if (i== I387_FTAG_REGNUM (tdep))
|
||
{
|
||
/* The fxsave area contains a simplified version of
|
||
the tag word. We have to look at the actual 80-bit
|
||
FP data to recreate the traditional i387 tag word. */
|
||
|
||
unsigned long ftag = 0;
|
||
int fpreg;
|
||
int top;
|
||
|
||
top = ((FXSAVE_ADDR (tdep, regs,
|
||
I387_FSTAT_REGNUM (tdep)))[1] >> 3);
|
||
top &= 0x7;
|
||
|
||
for (fpreg = 7; fpreg >= 0; fpreg--)
|
||
{
|
||
int tag;
|
||
|
||
if (val[0] & (1 << fpreg))
|
||
{
|
||
int thisreg = (fpreg + 8 - top) % 8
|
||
+ I387_ST0_REGNUM (tdep);
|
||
tag = i387_tag (FXSAVE_ADDR (tdep, regs, thisreg));
|
||
}
|
||
else
|
||
tag = 3; /* Empty */
|
||
|
||
ftag |= tag << (2 * fpreg);
|
||
}
|
||
val[0] = ftag & 0xff;
|
||
val[1] = (ftag >> 8) & 0xff;
|
||
}
|
||
regcache_raw_supply (regcache, i, val);
|
||
}
|
||
else
|
||
regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
|
||
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
||
regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
|
||
FXSAVE_MXCSR_ADDR (regs));
|
||
}
|
||
|
||
/* Similar to i387_collect_fxsave, but use XSAVE extended state. */
|
||
|
||
void
|
||
i387_collect_xsave (const struct regcache *regcache, int regnum,
|
||
void *xsave, int gcore)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
|
||
gdb_byte *regs = xsave;
|
||
int i;
|
||
enum
|
||
{
|
||
none = 0x0,
|
||
check = 0x1,
|
||
x87 = 0x2 | check,
|
||
sse = 0x4 | check,
|
||
avxh = 0x8 | check,
|
||
mpx = 0x10 | check,
|
||
all = x87 | sse | avxh | mpx
|
||
} regclass;
|
||
|
||
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
|
||
gdb_assert (tdep->num_xmm_regs > 0);
|
||
|
||
if (regnum == -1)
|
||
regclass = all;
|
||
else if (regnum >= I387_YMM0H_REGNUM (tdep)
|
||
&& regnum < I387_YMMENDH_REGNUM (tdep))
|
||
regclass = avxh;
|
||
else if (regnum >= I387_BND0R_REGNUM (tdep)
|
||
&& regnum < I387_MPXEND_REGNUM (tdep))
|
||
regclass = mpx;
|
||
else if (regnum >= I387_XMM0_REGNUM (tdep)
|
||
&& regnum < I387_MXCSR_REGNUM (tdep))
|
||
regclass = sse;
|
||
else if (regnum >= I387_ST0_REGNUM (tdep)
|
||
&& regnum < I387_FCTRL_REGNUM (tdep))
|
||
regclass = x87;
|
||
else
|
||
regclass = none;
|
||
|
||
if (gcore)
|
||
{
|
||
/* Clear XSAVE extended state. */
|
||
memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
|
||
|
||
/* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
|
||
if (tdep->xsave_xcr0_offset != -1)
|
||
memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
|
||
memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
|
||
}
|
||
|
||
if ((regclass & check))
|
||
{
|
||
gdb_byte raw[I386_MAX_REGISTER_SIZE];
|
||
gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
|
||
unsigned int xstate_bv = 0;
|
||
/* The supported bits in `xstat_bv' are 1 byte. */
|
||
unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
|
||
gdb_byte *p;
|
||
|
||
/* Clear register set if its bit in xstat_bv is zero. */
|
||
if (clear_bv)
|
||
{
|
||
if ((clear_bv & I386_XSTATE_BNDREGS))
|
||
for (i = I387_BND0R_REGNUM (tdep);
|
||
i < I387_BNDCFGU_REGNUM (tdep); i++)
|
||
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 16);
|
||
|
||
if ((clear_bv & I386_XSTATE_BNDCFG))
|
||
for (i = I387_BNDCFGU_REGNUM (tdep);
|
||
i < I387_MPXEND_REGNUM (tdep); i++)
|
||
memset (XSAVE_MPX_ADDR (tdep, regs, i), 0, 8);
|
||
|
||
if ((clear_bv & I386_XSTATE_AVX))
|
||
for (i = I387_YMM0H_REGNUM (tdep);
|
||
i < I387_YMMENDH_REGNUM (tdep); i++)
|
||
memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
|
||
|
||
if ((clear_bv & I386_XSTATE_SSE))
|
||
for (i = I387_XMM0_REGNUM (tdep);
|
||
i < I387_MXCSR_REGNUM (tdep); i++)
|
||
memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
|
||
|
||
if ((clear_bv & I386_XSTATE_X87))
|
||
for (i = I387_ST0_REGNUM (tdep);
|
||
i < I387_FCTRL_REGNUM (tdep); i++)
|
||
memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
|
||
}
|
||
|
||
if (regclass == all)
|
||
{
|
||
/* Check if any upper YMM registers are changed. */
|
||
if ((tdep->xcr0 & I386_XSTATE_AVX))
|
||
for (i = I387_YMM0H_REGNUM (tdep);
|
||
i < I387_YMMENDH_REGNUM (tdep); i++)
|
||
{
|
||
regcache_raw_collect (regcache, i, raw);
|
||
p = XSAVE_AVXH_ADDR (tdep, regs, i);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_AVX;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
}
|
||
/* Check if any upper MPX registers are changed. */
|
||
if ((tdep->xcr0 & I386_XSTATE_BNDREGS))
|
||
for (i = I387_BND0R_REGNUM (tdep);
|
||
i < I387_BNDCFGU_REGNUM (tdep); i++)
|
||
{
|
||
regcache_raw_collect (regcache, i, raw);
|
||
p = XSAVE_MPX_ADDR (tdep, regs, i);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_BNDREGS;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
}
|
||
|
||
/* Check if any upper MPX registers are changed. */
|
||
if ((tdep->xcr0 & I386_XSTATE_BNDCFG))
|
||
for (i = I387_BNDCFGU_REGNUM (tdep);
|
||
i < I387_MPXEND_REGNUM (tdep); i++)
|
||
{
|
||
regcache_raw_collect (regcache, i, raw);
|
||
p = XSAVE_MPX_ADDR (tdep, regs, i);
|
||
if (memcmp (raw, p, 8))
|
||
{
|
||
xstate_bv |= I386_XSTATE_BNDCFG;
|
||
memcpy (p, raw, 8);
|
||
}
|
||
}
|
||
|
||
/* Check if any SSE registers are changed. */
|
||
if ((tdep->xcr0 & I386_XSTATE_SSE))
|
||
for (i = I387_XMM0_REGNUM (tdep);
|
||
i < I387_MXCSR_REGNUM (tdep); i++)
|
||
{
|
||
regcache_raw_collect (regcache, i, raw);
|
||
p = FXSAVE_ADDR (tdep, regs, i);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_SSE;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
}
|
||
|
||
/* Check if any X87 registers are changed. */
|
||
if ((tdep->xcr0 & I386_XSTATE_X87))
|
||
for (i = I387_ST0_REGNUM (tdep);
|
||
i < I387_FCTRL_REGNUM (tdep); i++)
|
||
{
|
||
regcache_raw_collect (regcache, i, raw);
|
||
p = FXSAVE_ADDR (tdep, regs, i);
|
||
if (memcmp (raw, p, 10))
|
||
{
|
||
xstate_bv |= I386_XSTATE_X87;
|
||
memcpy (p, raw, 10);
|
||
}
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if REGNUM is changed. */
|
||
regcache_raw_collect (regcache, regnum, raw);
|
||
|
||
switch (regclass)
|
||
{
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
_("invalid i387 regclass"));
|
||
|
||
case avxh:
|
||
/* This is an upper YMM register. */
|
||
p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_AVX;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
break;
|
||
|
||
case mpx:
|
||
if (regnum < I387_BNDCFGU_REGNUM (tdep))
|
||
{
|
||
regcache_raw_collect (regcache, regnum, raw);
|
||
p = XSAVE_MPX_ADDR (tdep, regs, regnum);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_BNDREGS;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
}
|
||
else
|
||
{
|
||
p = XSAVE_MPX_ADDR (tdep, regs, regnum);
|
||
xstate_bv |= I386_XSTATE_BNDCFG;
|
||
memcpy (p, raw, 8);
|
||
}
|
||
break;
|
||
|
||
case sse:
|
||
/* This is an SSE register. */
|
||
p = FXSAVE_ADDR (tdep, regs, regnum);
|
||
if (memcmp (raw, p, 16))
|
||
{
|
||
xstate_bv |= I386_XSTATE_SSE;
|
||
memcpy (p, raw, 16);
|
||
}
|
||
break;
|
||
|
||
case x87:
|
||
/* This is an x87 register. */
|
||
p = FXSAVE_ADDR (tdep, regs, regnum);
|
||
if (memcmp (raw, p, 10))
|
||
{
|
||
xstate_bv |= I386_XSTATE_X87;
|
||
memcpy (p, raw, 10);
|
||
}
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Update the corresponding bits in `xstate_bv' if any SSE/AVX
|
||
registers are changed. */
|
||
if (xstate_bv)
|
||
{
|
||
/* The supported bits in `xstat_bv' are 1 byte. */
|
||
*xstate_bv_p |= (gdb_byte) xstate_bv;
|
||
|
||
switch (regclass)
|
||
{
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
_("invalid i387 regclass"));
|
||
|
||
case all:
|
||
break;
|
||
|
||
case x87:
|
||
case sse:
|
||
case avxh:
|
||
case mpx:
|
||
/* Register REGNUM has been updated. Return. */
|
||
return;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Return if REGNUM isn't changed. */
|
||
if (regclass != all)
|
||
return;
|
||
}
|
||
}
|
||
|
||
/* Only handle x87 control registers. */
|
||
for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
|
||
if (regnum == -1 || regnum == i)
|
||
{
|
||
/* Most of the FPU control registers occupy only 16 bits in
|
||
the xsave extended state. Give those a special treatment. */
|
||
if (i != I387_FIOFF_REGNUM (tdep)
|
||
&& i != I387_FOOFF_REGNUM (tdep))
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
regcache_raw_collect (regcache, i, buf);
|
||
|
||
if (i == I387_FOP_REGNUM (tdep))
|
||
{
|
||
/* The opcode occupies only 11 bits. Make sure we
|
||
don't touch the other bits. */
|
||
buf[1] &= ((1 << 3) - 1);
|
||
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
||
}
|
||
else if (i == I387_FTAG_REGNUM (tdep))
|
||
{
|
||
/* Converting back is much easier. */
|
||
|
||
unsigned short ftag;
|
||
int fpreg;
|
||
|
||
ftag = (buf[1] << 8) | buf[0];
|
||
buf[0] = 0;
|
||
buf[1] = 0;
|
||
|
||
for (fpreg = 7; fpreg >= 0; fpreg--)
|
||
{
|
||
int tag = (ftag >> (fpreg * 2)) & 3;
|
||
|
||
if (tag != 3)
|
||
buf[0] |= (1 << fpreg);
|
||
}
|
||
}
|
||
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
|
||
}
|
||
else
|
||
regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||
}
|
||
|
||
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
||
regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
|
||
FXSAVE_MXCSR_ADDR (regs));
|
||
}
|
||
|
||
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
|
||
*RAW. */
|
||
|
||
static int
|
||
i387_tag (const gdb_byte *raw)
|
||
{
|
||
int integer;
|
||
unsigned int exponent;
|
||
unsigned long fraction[2];
|
||
|
||
integer = raw[7] & 0x80;
|
||
exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
|
||
fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
|
||
fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
|
||
| (raw[5] << 8) | raw[4]);
|
||
|
||
if (exponent == 0x7fff)
|
||
{
|
||
/* Special. */
|
||
return (2);
|
||
}
|
||
else if (exponent == 0x0000)
|
||
{
|
||
if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
|
||
{
|
||
/* Zero. */
|
||
return (1);
|
||
}
|
||
else
|
||
{
|
||
/* Special. */
|
||
return (2);
|
||
}
|
||
}
|
||
else
|
||
{
|
||
if (integer)
|
||
{
|
||
/* Valid. */
|
||
return (0);
|
||
}
|
||
else
|
||
{
|
||
/* Special. */
|
||
return (2);
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Prepare the FPU stack in REGCACHE for a function return. */
|
||
|
||
void
|
||
i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
ULONGEST fstat;
|
||
|
||
/* Set the top of the floating-point register stack to 7. The
|
||
actual value doesn't really matter, but 7 is what a normal
|
||
function return would end up with if the program started out with
|
||
a freshly initialized FPU. */
|
||
regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
|
||
fstat |= (7 << 11);
|
||
regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
|
||
|
||
/* Mark %st(1) through %st(7) as empty. Since we set the top of the
|
||
floating-point register stack to 7, the appropriate value for the
|
||
tag word is 0x3fff. */
|
||
regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
|
||
|
||
}
|