465fb143c8
We want people to stop using the run.c frontend, but it's hard to notice when it's still set as the default. Lets flip things so nrun.c is the default, and users of run.c will get an error by default. We turn that error into a warning for existing sims so we don't break them -- this is mostly meant for people starting new ports.
183 lines
6.7 KiB
Makefile
183 lines
6.7 KiB
Makefile
# Makefile template for Configure for the CRIS simulator, based on a mix
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# of the ones for m32r and i960.
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#
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# Copyright (C) 2004-2015 Free Software Foundation, Inc.
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# Contributed by Axis Communications.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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## COMMON_PRE_CONFIG_FRAG
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CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
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CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
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CONFIG_DEVICES =
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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sim-cpu.o \
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sim-hrw.o \
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sim-model.o \
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sim-reg.o \
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cgen-utils.o cgen-trace.o cgen-scache.o \
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cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
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sim-if.o arch.o \
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$(CRISV10F_OBJS) \
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$(CRISV32F_OBJS) \
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traps.o devices.o \
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$(CONFIG_DEVICES) \
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cris-desc.o
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# Extra headers included by sim-main.h.
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# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
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arch.h cpuall.h cris-sim.h cris-desc.h
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SIM_EXTRA_CLEAN = cris-clean
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# This selects the cris newlib/libgloss syscall definitions.
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NL_TARGET = -DNL_TARGET_cris
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## COMMON_POST_CONFIG_FRAG
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CGEN_CPU_DIR = $(CGENDIR)/../cpu
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arch = cris
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sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
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# Needs CPU-specific knowledge.
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dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h)
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# This is the same rule as dv-core.o etc.
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dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers)
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arch.o: arch.c $(SIM_MAIN_DEPS)
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traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h)
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devices.o: devices.c $(SIM_MAIN_DEPS)
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# rvdummy is just used for testing. It does nothing if
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# --enable-sim-hardware isn't active.
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all: rvdummy$(EXEEXT)
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check: rvdummy$(EXEEXT)
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rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
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$(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
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rvdummy.o: rvdummy.c config.h tconfig.h $(remote_sim_h) $(callback_h)
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# CRISV10 objs
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CRISV10F_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpuv10.h decodev10.h engv10.h
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crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS)
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# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
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# than the apparent; some "mono" feature is work in progress)?
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mloopv10f.c engv10.h: stamp-v10fmloop
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stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -no-fast -pbb -switch semcrisv10f-switch.c \
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-cpu crisv10f -infile $(srcdir)/mloop.in
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$(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
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touch stamp-v10fmloop
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mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS)
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cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS)
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decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS)
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modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS)
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# CRISV32 objs
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CRISV32F_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpuv32.h decodev32.h engv32.h
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crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS)
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# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
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# than the apparent; some "mono" feature is work in progress)?
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mloopv32f.c engv32.h: stamp-v32fmloop
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# We depend on stamp-v10fmloop to get serialization to avoid
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# racing with it for the same temporary file-names when "make -j".
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stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -no-fast -pbb -switch semcrisv32f-switch.c \
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-cpu crisv32f -infile $(srcdir)/mloop.in
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$(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
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touch stamp-v32fmloop
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mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS)
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cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS)
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decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS)
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modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS)
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cris-clean:
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for v in 10 32; do \
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rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \
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rm -f stamp-v$${v}fcpu; \
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done
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-rm -f stamp-arch stamp-desc
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-rm -f tmp-*
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# cgen support, enable with --enable-cgen-maint
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CGEN_MAINT = ; @true
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# The following line is commented in or out depending upon --enable-cgen-maint.
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@CGEN_MAINT@CGEN_MAINT =
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# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
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stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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FLAGS="with-scache with-profile=fn"
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touch stamp-arch
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
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stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
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sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
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mv decodev10.c.tmp $(srcdir)/decodev10.c
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touch stamp-v10fcpu
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cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
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stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
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sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
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mv decodev32.c.tmp $(srcdir)/decodev32.c
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touch stamp-v32fcpu
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cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
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stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CGEN_CPU_DIR)/cris.cpu \
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cpu=cris mach=all
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touch stamp-desc
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cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc
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