452 lines
16 KiB
Text
452 lines
16 KiB
Text
Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
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* interp.c : Replace uses of pr_addr with pr_uword64
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where the bit length is always 64 independent of SIM_ADDR.
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(pr_uword64) : added.
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Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
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* configure: Re-generate.
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Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
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* configure: Regenerate to track ../common/aclocal.m4 changes.
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Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
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* interp.c (sim_open): New SIM_DESC result. Argument is now
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in argv form.
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(other sim_*): New SIM_DESC argument.
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start-sanitize-r5900
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Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
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* gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
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Change values to avoid overloading DOUBLEWORD which is tested
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for all insns.
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* gencode.c: reinstate "offending code".
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end-sanitize-r5900
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Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
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* interp.c: Fix printing of addresses for non-64-bit targets.
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(pr_addr): Add function to print address based on size.
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start-sanitize-r5900
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* gencode.c: #ifdef out offending code until a permanent fix
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can be added. Code is causing build errors for non-5900 mips targets.
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end-sanitize-r5900
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start-sanitize-r5900
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Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
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* gencode.c (process_instructions): Correct test for ISA dependent
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architecture bits in isa field of MIPS_DECODE.
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end-sanitize-r5900
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Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
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* interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
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start-sanitize-r5900
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Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
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* gencode.c (MIPS_DECODE): Correct instruction feature flags for
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PMADDUW.
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end-sanitize-r5900
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Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (build_mips16_operands): Correct computation of base
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address for extended PC relative instruction.
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start-sanitize-r5900
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Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
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* Makefile.in, configure, configure.in, gencode.c,
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interp.c, support.h: add r5900.
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end-sanitize-r5900
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Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
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* interp.c (mips16_entry): Add support for floating point cases.
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(SignalException): Pass floating point cases to mips16_entry.
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(ValueFPR): Don't restrict fmt_single and fmt_word to even
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registers.
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(StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
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or fmt_word.
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(COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
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and then set the state to fmt_uninterpreted.
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(COP_SW): Temporarily set the state to fmt_word while calling
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ValueFPR.
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Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (build_instruction): The high order may be set in the
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comparison flags at any ISA level, not just ISA 4.
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Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
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* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
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COMMON_{PRE,POST}_CONFIG_FRAG instead.
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* configure.in: sinclude ../common/aclocal.m4.
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* configure: Regenerated.
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Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
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* configure: Rebuild after change to aclocal.m4.
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Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
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* configure configure.in Makefile.in: Update to new configure
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scheme which is more compatible with WinGDB builds.
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* configure.in: Improve comment on how to run autoconf.
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* configure: Re-run autoconf to get new ../common/aclocal.m4.
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* Makefile.in: Use autoconf substitution to install common
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makefile fragment.
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Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
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* gencode.c (build_instruction): Use BigEndianCPU instead of
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ByteSwapMem.
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Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
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* interp.c (sim_monitor): Make output to stdout visible in
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wingdb's I/O log window.
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Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
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* support.h: Undo previous change to SIGTRAP
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and SIGQUIT values.
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Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
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* interp.c (store_word, load_word): New static functions.
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(mips16_entry): New static function.
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(SignalException): Look for mips16 entry and exit instructions.
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(simulate): Use the correct index when setting fpr_state after
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doing a pending move.
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Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
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* interp.c: Fix byte-swapping code throughout to work on
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both little- and big-endian hosts.
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Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
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* support.h: Make definitions of SIGTRAP and SIGQUIT consistent
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with gdb/config/i386/xm-windows.h.
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Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
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* gencode.c (build_instruction): Work around MSVC++ code gen bug
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that messes up arithmetic shifts.
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Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
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* support.h: Use _WIN32 instead of __WIN32__. Also add defs for
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SIGTRAP and SIGQUIT for _WIN32.
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Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (build_instruction) [MUL]: Cast operands to word64, to
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force a 64 bit multiplication.
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(build_instruction) [OR]: In mips16 mode, don't do anything if the
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destination register is 0, since that is the default mips16 nop
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instruction.
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Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
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(build_endian_shift): Don't check proc64.
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(build_instruction): Always set memval to uword64. Cast op2 to
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uword64 when shifting it left in memory instructions. Always use
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the same code for stores--don't special case proc64.
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* gencode.c (build_mips16_operands): Fix base PC value for PC
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relative operands.
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(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
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jal instruction.
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* interp.c (simJALDELAYSLOT): Define.
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(JALDELAYSLOT): Define.
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(INDELAYSLOT, INJALDELAYSLOT): Define.
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(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
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Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
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* interp.c (sim_open): add flush_cache as a PMON routine
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(sim_monitor): handle flush_cache by ignoring it
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Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
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* gencode.c (build_instruction): Use !ByteSwapMem instead of
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BigEndianMem.
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* interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
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(BigEndianMem): Rename to ByteSwapMem and change sense.
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(BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
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BigEndianMem references to !ByteSwapMem.
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(set_endianness): New function, with prototype.
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(sim_open): Call set_endianness.
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(sim_info): Use simBE instead of BigEndianMem.
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(xfer_direct_word, xfer_direct_long, swap_direct_word,
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swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
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xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
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ifdefs, keeping the prototype declaration.
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(swap_word): Rewrite correctly.
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(ColdReset): Delete references to CONFIG. Delete endianness related
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code; moved to set_endianness.
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Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
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* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
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* interp.c (CHECKHILO): Define away.
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(simSIGINT): New macro.
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(membank_size): Increase from 1MB to 2MB.
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(control_c): New function.
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(sim_resume): Rename parameter signal to signal_number. Add local
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variable prev. Call signal before and after simulate.
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(sim_stop_reason): Add simSIGINT support.
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(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
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functions always.
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(sim_warning): Delete call to SignalException. Do call printf_filtered
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if logfh is NULL.
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(AddressTranslation): Add #ifdef DEBUG around debugging message and
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a call to sim_warning.
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Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
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16 bit instructions.
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Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
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Add support for mips16 (16 bit MIPS implementation):
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* gencode.c (inst_type): Add mips16 instruction encoding types.
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(GETDATASIZEINSN): Define.
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(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
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jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
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mtlo.
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(MIPS16_DECODE): New table, for mips16 instructions.
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(bitmap_val): New static function.
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(struct mips16_op): Define.
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(mips16_op_table): New table, for mips16 operands.
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(build_mips16_operands): New static function.
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(process_instructions): If PC is odd, decode a mips16
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instruction. Break out instruction handling into new
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build_instruction function.
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(build_instruction): New static function, broken out of
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process_instructions. Check modifiers rather than flags for SHIFT
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bit count and m[ft]{hi,lo} direction.
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(usage): Pass program name to fprintf.
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(main): Remove unused variable this_option_optind. Change
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``*loptarg++'' to ``loptarg++''.
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(my_strtoul): Parenthesize && within ||.
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* interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
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(simulate): If PC is odd, fetch a 16 bit instruction, and
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increment PC by 2 rather than 4.
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* configure.in: Add case for mips16*-*-*.
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* configure: Rebuild.
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Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
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* interp.c: Allow -t to enable tracing in standalone simulator.
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Fix garbage output in trace file and error messages.
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Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
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* Makefile.in: Delete stuff moved to ../common/Make-common.in.
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(SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
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* configure.in: Simplify using macros in ../common/aclocal.m4.
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* configure: Regenerated.
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* tconfig.in: New file.
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Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
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* interp.c: Fix bugs in 64-bit port.
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Use ansi function declarations for msvc compiler.
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Initialize and test file pointer in trace code.
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Prevent duplicate definition of LAST_EMED_REGNUM.
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Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
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* interp.c (xfer_big_long): Prevent unwanted sign extension.
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Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (SignalException): Check for explicit terminating
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breakpoint value.
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* gencode.c: Pass instruction value through SignalException()
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calls for Trap, Breakpoint and Syscall.
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Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
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only used on those hosts that provide it.
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* configure.in: Add sqrt() to list of functions to be checked for.
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* config.in: Re-generated.
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* configure: Re-generated.
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Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (process_instructions): Call build_endian_shift when
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expanding STORE RIGHT, to fix swr.
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* support.h (SIGNEXTEND): If the sign bit is not set, explicitly
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clear the high bits.
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* interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
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Fix float to int conversions to produce signed values.
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Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
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* gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
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(process_instructions): Correct handling of nor instruction.
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Correct shift count for 32 bit shift instructions. Correct sign
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extension for arithmetic shifts to not shift the number of bits in
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the type. Fix 64 bit multiply high word calculation. Fix 32 bit
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unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
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Fix madd.
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* interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
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It's OK to have a mult follow a mult. What's not OK is to have a
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mult follow an mfhi.
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(Convert): Comment out incorrect rounding code.
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Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (sim_monitor): Improved monitor printf
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simulation. Tidied up simulator warnings, and added "--log" option
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for directing warning message output.
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* gencode.c: Use sim_warning() rather than WARNING macro.
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Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
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* Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
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getopt1.o, rather than on gencode.c. Link objects together.
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Don't link against -liberty.
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(gencode.o, getopt.o, getopt1.o): New targets.
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* gencode.c: Include <ctype.h> and "ansidecl.h".
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(AND): Undefine after including "ansidecl.h".
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(ULONG_MAX): Define if not defined.
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(OP_*): Don't define macros; now defined in opcode/mips.h.
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(main): Call my_strtoul rather than strtoul.
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(my_strtoul): New static function.
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Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
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* gencode.c (process_instructions): Generate word64 and uword64
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instead of `long long' and `unsigned long long' data types.
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* interp.c: #include sysdep.h to get signals, and define default
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for SIGBUS.
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* (Convert): Work around for Visual-C++ compiler bug with type
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conversion.
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* support.h: Make things compile under Visual-C++ by using
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__int64 instead of `long long'. Change many refs to long long
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into word64/uword64 typedefs.
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Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
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* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
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INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
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(docdir): Removed.
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* configure.in (AC_PREREQ): autoconf 2.5 or higher.
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(AC_PROG_INSTALL): Added.
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(AC_PROG_CC): Moved to before configure.host call.
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* configure: Rebuilt.
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Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
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* configure.in: Define @SIMCONF@ depending on mips target.
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* configure: Rebuild.
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* Makefile.in (run): Add @SIMCONF@ to control simulator
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construction.
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* gencode.c: Change LOADDRMASK to 64bit memory model only.
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* interp.c: Remove some debugging, provide more detailed error
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messages, update memory accesses to use LOADDRMASK.
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Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
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* configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
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AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
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stamp-h.
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* configure: Rebuild.
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* config.in: New file, generated by autoheader.
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* interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
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and <strings.h> if they exist. Replace #ifdef sun with #ifdef
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HAVE_ANINT and HAVE_AINT, as appropriate.
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* Makefile.in (run): Use @LIBS@ rather than -lm.
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(interp.o): Depend upon config.h.
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(Makefile): Just rebuild Makefile.
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(clean): Remove stamp-h.
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(mostlyclean): Make the same as clean, not as distclean.
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(config.h, stamp-h): New targets.
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Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (ColdReset): Fix boolean test. Make all simulator
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globals static.
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Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (xfer_direct_word, xfer_direct_long,
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swap_direct_word, swap_direct_long, xfer_big_word,
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xfer_big_long, xfer_little_word, xfer_little_long,
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swap_word,swap_long): Added.
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* interp.c (ColdReset): Provide function indirection to
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host<->simulated_target transfer routines.
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* interp.c (sim_store_register, sim_fetch_register): Updated to
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make use of indirected transfer routines.
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Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
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* gencode.c (process_instructions): Ensure FP ABS instruction
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recognised.
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* interp.c (AbsoluteValue): Add routine. Also provide simple PMON
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system call support.
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Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (sim_do_command): Complain if callback structure not
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initialised.
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Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c (Convert): Provide round-to-nearest and round-to-zero
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support for Sun hosts.
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* Makefile.in (gencode): Ensure the host compiler and libraries
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used for cross-hosted build.
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Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
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* interp.c, gencode.c: Some more (TODO) tidying.
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Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
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* gencode.c, interp.c: Replaced explicit long long references with
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WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
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* support.h (SET64LO, SET64HI): Macros added.
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Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
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* configure: Regenerate with autoconf 2.7.
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Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
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* interp.c (LoadMemory): Enclose text following #endif in /* */.
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* support.h: Remove superfluous "1" from #if.
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* support.h (CHECKSIM): Remove stray 'a' at end of line.
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Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
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* interp.c (StoreFPR): Control UndefinedResult() call on
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WARN_RESULT manifest.
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Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
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* gencode.c: Tidied instruction decoding, and added FP instruction
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support.
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* interp.c: Added dineroIII, and BSD profiling support. Also
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run-time FP handling.
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Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
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* Changelog, Makefile.in, README.Cygnus, configure, configure.in,
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gencode.c, interp.c, support.h: created.
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